/**
 @file ctc_port.h

 @author  Copyright (C) 2011 Centec Networks Inc.  All rights reserved.

 @date 2011-11-9

 @version v2.0

 This file contains all port related data structure, enum, macro and proto.

*/

#ifndef _CTC_PORT_H
#define _CTC_PORT_H
#ifdef __cplusplus
extern "C" {
#endif

/****************************************************************
 *
 * Header Files
 *
 ***************************************************************/

#include "ctc_const.h"
#include "ctc_common.h"
/****************************************************************
*
* Defines and Macros
*
****************************************************************/

/**
 @defgroup port PORT
 @{
*/

#define CTC_PORT_PREFIX_PORT_MAC_NUM    2
#define CTC_PORT_CLASS_ID_RSV_VLAN_CLASS 62
#define CTC_PORT_CLASS_ID_RSV_IP_SRC_GUARD 63
#define CTC_PORT_SERDES_MAX_NUM         8


/**
 @brief Port vlan tag ctl
*/
enum ctc_vlantag_ctl_e
{
    CTC_VLANCTL_ALLOW_ALL_PACKETS,                            /**< [GB.GG.D2.TM.TMM.TMA.AT] Allow all packet regardless of vlan tag*/
    CTC_VLANCTL_DROP_ALL_UNTAGGED,                            /**< [GB.GG.D2.TM.TMM.TMA.AT] Drop all untagged packet*/
    CTC_VLANCTL_DROP_ALL_TAGGED,                                /**< [GB.GG.D2.TM.TMM.TMA.AT] Drop all tagged packet*/
    CTC_VLANCTL_DROP_ALL,                                             /**< [GB.GG.D2.TM.TMM.TMA.AT] Drop all packet*/
    CTC_VLANCTL_DROP_PACKET_WITHOUT_TWO_TAG,        /**< [GB.GG.D2.TM.TMM.AT] Drop packet without double tagged*/
    CTC_VLANCTL_DROP_ALL_PACKET_WITH_TWO_TAG,       /**< [GB.GG.D2.TM.TMM.AT] Drop packet with double tagged*/
    CTC_VLANCTL_DROP_ALL_SVLAN_TAG,                          /**< [GB.GG.D2.TM.TMM.AT] Drop packet with stag*/
    CTC_VLANCTL_DROP_ALL_NON_SVLAN_TAG,                  /**< [GB.GG.D2.TM.TMM.AT] Drop packet without stag*/
    CTC_VLANCTL_DROP_ONLY_SVLAN_TAG,                       /**< [GB.GG.D2.TM.TMM.AT] Drop packet with only stag*/
    CTC_VLANCTL_PERMIT_ONLY_SVLAN_TAG,                    /**< [GB.GG.D2.TM.TMM.AT] Permit packet with only stag*/
    CTC_VLANCTL_DROP_ALL_CVLAN_TAG,                         /**< [GB.GG.D2.TM.TMM.AT] Drop packet with ctag*/
    CTC_VLANCTL_DROP_ALL_NON_CVLAN_TAG,                 /**< [GB.GG.D2.TM.TMM.AT] Drop packet without ctag*/
    CTC_VLANCTL_DROP_ONLY_CVLAN_TAG,                       /**< [GB.GG.D2.TM.TMM.AT] Drop packet with only ctag*/
    CTC_VLANCTL_PERMIT_ONLY_CVLAN_TAG,                     /**< [GB.GG.D2.TM.TMM.AT] Permit packet with only ctag*/

    MAX_CTC_VLANTAG_CTL
};
typedef enum ctc_vlantag_ctl_e ctc_vlantag_ctl_t;

/**
 @brief Port dot1q type
*/
enum ctc_dot1q_type_e
{
    CTC_DOT1Q_TYPE_NONE,        /**< [GB.GG.D2.TM.TMM.AT] Packet transmit out with untag*/
    CTC_DOT1Q_TYPE_CVLAN,       /**< [GB.GG.D2.TM.TMM.AT] Packet transmit out with ctag*/
    CTC_DOT1Q_TYPE_SVLAN,       /**< [GB.GG.D2.TM.TMM.AT] Packet transmit out with stag*/
    CTC_DOT1Q_TYPE_BOTH         /**< [GB.GG.D2.TM.TMM.AT] Packet transmit out with double tag*/
};
typedef enum ctc_dot1q_type_e ctc_dot1q_type_t;

/**
 @brief Port speed type
*/

enum ctc_port_speed_e
{
    CTC_PORT_SPEED_1G,          /**< [GB.GG.D2.TM.TMM.TMA.AT] Port speed 1G mode*/
    CTC_PORT_SPEED_100M,        /**< [GB.GG.D2.TM.TMM.TMA.AT] Port speed 100M mode*/
    CTC_PORT_SPEED_10M,         /**< [GB.GG.D2.TM.TMM.TMA.AT] Port speed 10M mode*/
    CTC_PORT_SPEED_2G5,         /**< [GB.GG.D2.TM.TMM.AT] Port speed 2.5G mode*/
    CTC_PORT_SPEED_10G,         /**< [GB.GG.D2.TM.TMM.AT] Port speed 10G mode*/
    CTC_PORT_SPEED_20G,         /**< [GG.D2.TM] Port speed 20G mode*/
    CTC_PORT_SPEED_40G,         /**< [GG.D2.TM.TMM.AT] Port speed 40G mode*/
    CTC_PORT_SPEED_100G,        /**< [GG.D2.TM.TMM.AT] Port speed 100G mode*/
    CTC_PORT_SPEED_5G,          /**< [D2.TM] Port speed 5G mode*/
    CTC_PORT_SPEED_25G,         /**< [D2.TM.TMM.AT] Port speed 25G mode*/
    CTC_PORT_SPEED_50G,         /**< [D2.TM.TMM.AT] Port speed 50G mode*/
    CTC_PORT_SPEED_200G,        /**< [TMM.AT] Port speed 200G mode*/
    CTC_PORT_SPEED_400G,        /**< [TMM.AT] Port speed 400G mode*/
    CTC_PORT_SPEED_800G,        /**< [AT] Port speed 800G mode*/
    CTC_PORT_SPEED_MAX
};
typedef enum ctc_port_speed_e ctc_port_speed_t;
/**
 @brief define mac type of port
*/
enum ctc_port_mac_type_e
{
    CTC_PORT_MAC_GMAC,      /**< [GB] Mac type gmac, speed can be 1G 100M and 10M*/
    CTC_PORT_MAC_XGMAC,     /**< [GB] Mac type Xgmac, speed at 10G*/
    CTC_PORT_MAC_SGMAC,     /**< [GB] Mac type Sgmac, speed can be 13G*/
    CTC_PORT_MAC_CPUMAC,    /**< [GB] Mac type Cpumac, uplink to cpu*/
    CTC_PORT_MAC_MAX
};
typedef enum ctc_port_mac_type_e ctc_port_mac_type_t;

/**
 @brief Port max frame size type
*/
enum ctc_frame_size_e
{
    CTC_FRAME_SIZE_0,       /**< [GG.D2] Max/min frame size0*/
    CTC_FRAME_SIZE_1,       /**< [GG.D2] Max/min frame size1*/
    CTC_FRAME_SIZE_2,       /**< [GG.D2] Max/min frame size2*/
    CTC_FRAME_SIZE_3,       /**< [GG.D2] Max/min frame size3*/
    CTC_FRAME_SIZE_4,       /**< [GG.D2] Max/min frame size4*/
    CTC_FRAME_SIZE_5,       /**< [GG.D2] Max/min frame size5*/
    CTC_FRAME_SIZE_6,       /**< [GG.D2] Max/min frame size6*/
    CTC_FRAME_SIZE_7,       /**< [GG.D2] Max/min frame size7*/
    CTC_FRAME_SIZE_MAX
};
typedef enum ctc_frame_size_e ctc_frame_size_t;

/**
 @brief Port inter-packet gap size
*/
enum ctc_ipg_size_e
{
    CTC_IPG_SIZE_0,       /**< [GB.GG.D2.TM.TMM.AT] Ipg size0*/
    CTC_IPG_SIZE_1,       /**< [GB.GG.D2.TM.TMM.AT] Ipg size1*/
    CTC_IPG_SIZE_2,       /**< [GB.GG.D2.TM.TMM.AT] Ipg size2*/
    CTC_IPG_SIZE_3,       /**< [GB.GG.D2.TM.TMM.AT] Ipg size3*/
    CTC_IPG_SIZE_MAX
};
typedef enum ctc_ipg_size_e ctc_ipg_size_t;

/**
 @brief Port loopback action type
*/
enum ctc_port_lbk_type_e
{
    CTC_PORT_LBK_TYPE_SWAP_MAC,  /**< [GB.GG.D2.TM.TMM.AT] After port loopback, packet mac is swap*/
    CTC_PORT_LBK_TYPE_BYPASS,       /**< [GB.GG.D2.TM.TMM.AT] After port loopback, packet is no change*/
    CTC_PORT_LBK_TYPE_MAX
};
typedef enum ctc_port_lbk_type_e ctc_port_lbk_type_t;

/**
 @brief Port arp packet processing type
*/
enum ctc_port_arp_action_type_e
{
    CTC_PORT_ARP_ACTION_TYPE_FW_EX       = 0,    /**< [GB.GG.D2.TM.TMM.AT] Normal forwarding and exception to CPU*/
    CTC_PORT_ARP_ACTION_TYPE_FW          = 1,       /**< [GB.GG.D2.TM.TMM.AT] Normal forwarding, no exception*/
    CTC_PORT_ARP_ACTION_TYPE_EX          = 2,        /**< [GB.GG.D2.TM.TMM.AT] Always exception to CPU, and discard*/
    CTC_PORT_ARP_ACTION_TYPE_DISCARD     = 3,    /**< [GB.GG.D2.TM.TMM.AT] Discard*/
    CTC_PORT_ARP_ACTION_TYPE_MAX
};
typedef enum ctc_port_arp_action_type_e ctc_port_arp_action_type_t;

/**
 @brief Port dhcp packet processing type
*/
enum ctc_port_dhcp_action_type_e
{
    CTC_PORT_DHCP_ACTION_TYPE_FW_EX = 0,     /**< [GB.GG.D2.TM.TMM.AT] Normal forwarding and exception to CPU*/
    CTC_PORT_DHCP_ACTION_TYPE_FW = 1,        /**< [GB.GG.D2.TM.TMM.AT] Normal forwarding, no exception*/
    CTC_PORT_DHCP_ACTION_TYPE_EX = 2,        /**< [GB.GG.D2.TM.TMM.AT] Always exception to CPU and discard*/
    CTC_PORT_DHCP_ACTION_TYPE_DISCARD = 3,   /**< [GB.GG.D2.TM.TMM.AT] No exception and discard*/
    CTC_PORT_DHCP_ACTION_TYPE_MAX
};
typedef enum ctc_port_dhcp_action_type_e ctc_port_dhcp_action_type_t;

/**
 @brief Port rpf type
*/
enum ctc_port_rpf_type_e
{
    CTC_PORT_RPF_TYPE_STRICT = 0,   /**< [GB.GG.D2.TM.TMM.AT] Strict*/
    CTC_PORT_RPF_TYPE_LOOSE = 1,    /**< [GB.GG.D2.TM.TMM.AT] Loose*/
    CTC_PORT_RPF_TYPE_MAX
};
typedef enum ctc_port_rpf_type_e ctc_port_rpf_type_t;

/**
 @brief Port lbk mode
*/
enum ctc_port_lbk_mode_e
{
    CTC_PORT_LBK_MODE_CC,           /**< [GB.GG.D2.TM.TMM.AT] Crossconnect loopback*/
    CTC_PORT_LBK_MODE_EFM,          /**< [GB.GG.D2.TM.TMM.AT] Efm loopback*/
    CTC_PORT_LBK_MODE_TAP           /**< [GG] TAP*/
};
typedef enum ctc_port_lbk_mode_e ctc_port_lbk_mode_t;

/**
 @brief Port loopback parameter
*/
struct ctc_port_lbk_param_s
{
    ctc_port_lbk_type_t lbk_type;     /**< [GB.GG.D2.TM.TMM.AT] Port loopback type,
                                                          refer to ctc_port_lbk_type_t*/
    uint32 src_gport;                      /**< [GB.GG.D2.TM.TMM.AT] Souce port for loopback*/
    uint32 dst_gport;                      /**< [GB.GG.D2.TM.TMM.AT] Destination port for loopback. NOTE: when efm and crossconnect loopback,
                                                           if dst_gport equal src_gport, indicat loopback to self, other port to this port is discard.
                                                           when TAP, mac has been divided into groups. if use one mac as TAP dest,
                                                           all mac included in the group which has the TAP dest mac won't do normal forwarding. */
    uint8   lbk_enable;                    /**< [GB.GG.D2.TM.TMM.AT] If set, enable/disable loopback*/
    uint8   lbk_mode;                     /**< [GB.GG.D2.TM.TMM.AT] Refer to ctc_port_lbk_mode_t*/
    uint32  lbk_gport;                     /**< [GB.GG.D2.TM.TMM.AT] [out] Lbk_gport is internal port.
                                                         using for EFM OAM loopback,
                                                         when EFM OAM loopback enable,
                                                         packet from cpu to loopback port
                                                         should use the internal port*/

    uint8    rsv1[2];
};
typedef struct ctc_port_lbk_param_s ctc_port_lbk_param_t;

/**
 @brief Port scl key type
*/
enum ctc_port_scl_key_type_e
{
    CTC_SCL_KEY_TYPE_DISABLE,                                      /**< [GB.GG.D2.TM.TMM.AT] Disable scl key*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_PORT,                   /**< [GB] Scl vlan mapping using port*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_CVID,                   /**< [GB] Scl vlan mapping using cvlan id*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_SVID,                   /**< [GB.GG.D2.TM.TMM.AT] Scl vlan mapping using svlan id*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_CVID_CCOS,         /**< [GB] Scl vlan mapping using cvlan id and cos*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_SVID_SCOS,         /**< [GB] Scl vlan mapping using svlan id and cos*/
    CTC_SCL_KEY_TYPE_VLAN_MAPPING_DVID,                   /**< [GB] Scl vlan mapping using both svlan and cvlan id*/

    CTC_SCL_KEY_TYPE_VLAN_CLASS_MAC_SA,                  /**< [GB] Scl vlan class using macsa*/
    CTC_SCL_KEY_TYPE_VLAN_CLASS_MAC_DA,                  /**< [GB] Scl vlan class using macda*/
    CTC_SCL_KEY_TYPE_VLAN_CLASS_IPV4,                       /**< [GB] Scl vlan class using ipv4 addr*/
    CTC_SCL_KEY_TYPE_VLAN_CLASS_IPV6,                       /**< [GB] Scl vlan class using ipv6 addr*/

    CTC_SCL_KEY_TYPE_IPSG_PORT_MAC,                          /**< [GB] Scl ip source guard check mode:
                                                                                              CTC_SECURITY_BINDING_TYPE_IP_MAC_VLAN/
                                                                                              CTC_SECURITY_BINDING_TYPE_MAC/
                                                                                              CTC_SECURITY_BINDING_TYPE_MAC_VLAN*/
    CTC_SCL_KEY_TYPE_IPSG_PORT_IP,                             /**< [GB] Scl ip source guard check mode:
                                                                                              CTC_SECURITY_BINDING_TYPE_IP/
                                                                                              CTC_SECURITY_BINDING_TYPE_IP_VLAN/
                                                                                              CTC_SECURITY_BINDING_TYPE_IP_MAC*/
    CTC_SCL_KEY_TYPE_IPSG_IPV6,                                   /**< [GB] Scl ip source guard check mode:
                                                                                              CTC_SECURITY_BINDING_TYPE_IPV6_MAC*/

    CTC_SCL_KEY_TYPE_IPV4_TUNNEL,                               /**< [GB] Scl tunnel identify for IPv4/IPv6 in IPv4
                                                                                               and GRE with/without GRE key*/
    CTC_SCL_KEY_TYPE_IPV4_TUNNEL_AUTO,                      /**< [GG.D2.TM.TMM.AT] Scl tunnel identify for IPv4/IPv6 in IPv4,
                                                                                               6to4 and ISATAP*/
    CTC_SCL_KEY_TYPE_IPV6_TUNNEL,                                /**< [GB] Scl tunnel identify for any in IPv6*/
    CTC_SCL_KEY_TYPE_IPV4_TUNNEL_WITH_RPF,               /**< [GB] Scl tunnel identiry for IPv4/IPv6 in IPv4,
                                                                                               GRE with/without GRE key tunnel, with outer head RPF check*/
    CTC_SCL_KEY_TYPE_IPV6_TUNNEL_WITH_RPF,               /**< [GB] Scl tunnel idenitfy for any in IPv6 tunnel,
                                                                                               with outer head RPF check*/
    CTC_SCL_KET_TYPE_NVGRE,                                          /**< [GG.D2.TM.TMM.AT] Scl tunnel identify for NvGre*/
    CTC_SCL_KET_TYPE_VXLAN,                                          /**< [GG.D2.TM.TMM.AT] Scl tunnel identify for Vxlan*/

    CTC_SCL_KEY_TYPE_MAX
};
typedef enum ctc_port_scl_key_type_e ctc_port_scl_key_type_t;

/**
 @brief Port vlan domain type
*/
enum ctc_port_vlan_domain_type_e
{
    CTC_PORT_VLAN_DOMAIN_SVLAN                = 0,    /**< [GB.GG.D2.TM.TMM.TMA.AT] Svlan domain*/
    CTC_PORT_VLAN_DOMAIN_CVLAN                = 1,    /**< [GB.GG.D2.TM.TMM.TMA.AT] Cvlan domain*/
    CTC_PORT_VLAN_DOMAIN_MAX
};
typedef enum ctc_port_vlan_domain_type_e ctc_port_vlan_domain_type_t;

/*
 @brief Port raw packet type
*/
enum ctc_port_raw_packet_e
{
    CTC_PORT_RAW_PKT_NONE,          /**< [GB.GG.D2.TM.TMM.AT] Raw packet parser disable*/
    CTC_PORT_RAW_PKT_ETHERNET,      /**< [GB.GG.D2.TM.TMM.AT] Port parser ethernet raw packet*/
    CTC_PORT_RAW_PKT_IPV4,          /**< [GB.GG.D2.TM.TMM.AT] Port only parser ipv4 raw packet*/
    CTC_PORT_RAW_PKT_IPV6,          /**< [GB.GG.D2.TM.TMM.AT] Port only parser ipv6 raw packet*/
    CTC_PORT_RAW_PKT_MPLS,          /**< [D2.TM.TMM.AT] Port only parser mpls raw packet*/
    CTC_PORT_RAW_PKT_NOP,           /**< [TMM] Port do not parser raw packet*/
    CTC_PORT_RAW_PKT_MAX
};
typedef enum ctc_port_raw_packet_e ctc_port_raw_packet_t;

/*
 @brief Port restriction type: private vlan, blocking based on port and port isolation
*/
enum ctc_port_restriction_mode_e
{
    CTC_PORT_RESTRICTION_DISABLE = 0,                   /**< [GB.GG.D2.TM.TMM.TMA.AT] Private vlan, blocking and port isolation is disable on port*/
    CTC_PORT_RESTRICTION_PVLAN,                           /**< [GB.GG.D2.TM.TMM.AT] Private vlan is enabled on port*/
    CTC_PORT_RESTRICTION_PORT_BLOCKING,             /**< [GB.GG.D2.TM.TMM.TMA.AT] Blocking based on port is enabled on port*/
    CTC_PORT_RESTRICTION_PORT_ISOLATION             /**< [GB.GG.D2.TM.TMM.AT] Port isolation is enabled on port*/
};
typedef enum ctc_port_restriction_mode_e ctc_port_restriction_mode_t;

/*
 @brief Port private vlan type
*/
enum ctc_port_pvlan_type_e
{
    CTC_PORT_PVLAN_NONE  = 0,          /**< [GB.GG.D2.TM.TMM.AT] Port is none port*/
    CTC_PORT_PVLAN_PROMISCUOUS,   /**< [GB.GG.D2.TM.TMM.AT] Port is promiscuous port,isolated id must not be configured*/
    CTC_PORT_PVLAN_ISOLATED,          /**< [GB.GG.D2.TM.TMM.AT] Port is isolated port,isolated id must not be configured*/
    CTC_PORT_PVLAN_COMMUNITY       /**< [GB.GG.D2.TM.TMM.AT] Port is community port,isolated id must be configured*/
};
typedef enum ctc_port_pvlan_type_e ctc_port_pvlan_type_t;

/*
 @brief Port isolation packet isolated type
*/
enum ctc_port_isolation_pkt_type_e
{
    CTC_PORT_ISOLATION_ALL                 = 0x0000,                 /**< [GB.GG.D2.TM.TMM.TMA.AT] All packet will be isolated*/
    CTC_PORT_ISOLATION_UNKNOW_UCAST        = 0x0001,        /**< [GB.GG.D2.TM.TMM.TMA.AT] Unknown ucast type packet will be isolated*/
    CTC_PORT_ISOLATION_UNKNOW_MCAST        = 0x0002,        /**< [GB.GG.D2.TM.TMM.TMA.AT] Unknown mcast type packet will be isolated*/
    CTC_PORT_ISOLATION_KNOW_UCAST          = 0x0004,          /**< [GG.D2.TM.TMM.TMA.AT] Known ucast type packet will be isolated*/
    CTC_PORT_ISOLATION_KNOW_MCAST          = 0x0008,          /**< [GB.GG.D2.TM.TMM.TMA.AT] Known mcast type packet will be isolated*/
    CTC_PORT_ISOLATION_BCAST               = 0x0010                /**< [GB.GG.D2.TM.TMM.TMA.AT] Bcast type packet will be isolated*/
};
typedef enum ctc_port_isolation_pkt_type_e ctc_port_isolation_pkt_type_t;

/*
 @brief Port blocking packet blocked type
*/
enum ctc_port_blocking_pkt_type_e
{
    CTC_PORT_BLOCKING_UNKNOW_UCAST        = 0x0001,        /**< [GB.GG.D2.TM.TMM.TMA.AT] Unknown ucast type packet will be blocked*/
    CTC_PORT_BLOCKING_UNKNOW_MCAST        = 0x0002,        /**< [GB.GG.D2.TM.TMM.TMA.AT] Unknown mcast type packet will be blocked*/
    CTC_PORT_BLOCKING_KNOW_UCAST          = 0x0004,           /**< [GB.GG.D2.TM.TMM.AT] Known ucast type packet will be blocked*/
    CTC_PORT_BLOCKING_KNOW_MCAST          = 0x0008,          /**< [GB.GG.D2.TM.TMM.AT] Known mcast type packet will be blocked*/
    CTC_PORT_BLOCKING_BCAST               = 0x0010                 /**< [GB.GG.D2.TM.TMM.TMA.AT] Bcast type packet will be blocked*/
};
typedef enum ctc_port_blocking_pkt_type_e ctc_port_blocking_pkt_type_t;

/**
  @brief Port restriction parameter: private vlan, port isolation, blocking based on port
*/
struct ctc_port_restriction_s
{
    ctc_port_restriction_mode_t mode;                     /**< [GB.GG.D2.TM.TMM.TMA.AT] Restriction mode enable on port, see ctc_port_restriction_mode_t*/
    ctc_direction_t dir;                                  /**< [GB.GG.D2.TM.TMM.AT] Direction*/
    uint16 isolated_id;                                   /**< [GB.GG.D2.TM.TMM.AT] If port is community port in private vlan, isolated id <0-15>
                                                                       If port isolation is enabled on port, isolated id <0-31>, 0 means disable*/
    uint16 type;                                          /**< [GB.GG.D2.TM.TMM.TMA.AT] If private vlan is enabled on port,
                                                                       set pvlan type on port(see ctc_port_pvlan_type_e);
                                                                       if port isolation is enabled on port, set isolated id,
                                                                       and if the dir is egress,
                                                                       set isolation packet type on port(see ctc_port_isolation_pkt_type_e)
                                                                       if blocking based on port is enabled on port,
                                                                       set blocking packet type on port(see ctc_port_blocking_pkt_type_e)*/
};
typedef struct ctc_port_restriction_s ctc_port_restriction_t;

/*
 @brief Port isolation configure
*/
struct ctc_port_isolation_s
{
   uint8 mode;               /**< [TM.TMM.AT] Mode0, one-way isolation, gport used as ingress source port, pbm used as egress port bitmap, only support in singe chip.
                                       mode: 1, two-way isolation, gport used as isolation group id, pbm used as isolation group id bitmap.
                                       mode: 2, one-way isolation, gports used as isolation group id, pbm used as egress port bitmap, support multi-chips.*/
   uint8 use_isolation_id;   /**< [GG.D2.TM.TMM.AT] If set, use isolation_id as isolation group's member; else use port as isolation group's member.*/
   uint8 mlag_en;             /**< [GG.D2.TM.TMM.AT] Enable MLAG port isolation, dest is gport bitmap if is_linkagg = 0.*/
   uint8 is_linkagg;          /**< [D2.TM.TMM.AT] If is_linkagg = 1, dest is linkagg bitmap, used for MLAG port isolation*/
   uint8 isolation_pkt_type;  /**< [GG.D2.TM.TMM.TMA.AT] Isolation packet type on port(ctc_port_isolation_pkt_type_t)*/

   uint32 gport;              /**< [GG.D2.TM.TMM.TMA.AT] Mode: 0 or use_isolation_id=0, means ingress source port which be isolated.
                                              mode: 1 and 2 or use_isolation_id=1, means isolation group */
   ctc_port_bitmap_t pbm;     /**< [GG.D2.TM.TMM.TMA.AT] Mode:1 and 2 or use_isolation_id = 1, means source isolation group bitmap;
                                              mode: 0 or use_isolation_id=0 means ports be blocked or allow packets from a given ingress port.*/
};
typedef struct ctc_port_isolation_s ctc_port_isolation_t;

/**
  @brief Port untag port default vlan type
*/
enum ctc_port_untag_pvid_type_e
{
    CTC_PORT_UNTAG_PVID_TYPE_NONE,                       /**< [GB.GG.D2.TM.TMM.AT] Do nothing for port default svlan or cvlan id*/
    CTC_PORT_UNTAG_PVID_TYPE_SVLAN,                      /**< [GB.GG.D2.TM.TMM.AT] Untag port default svlan id*/
    CTC_PORT_UNTAG_PVID_TYPE_CVLAN,                      /**< [GB.GG.D2.TM.TMM.AT] Untag port default cvlan id*/
    CTC_PORT_UNTAG_PVID_TYPE_MAX
};
typedef enum ctc_port_untag_pvid_type_e ctc_port_untag_pvid_type_t;

/**
  @brief Port 802.3ap port ability flags
*/
enum ctc_port_cl73_ability_e
{
    CTC_PORT_CL73_10GBASE_KR      = (1 << 0 ),      /**< [GG.D2.TM.TMM.AT] 10GBase-KR ability */
    CTC_PORT_CL73_40GBASE_KR4     = (1 << 1 ),     /**< [GG.D2.TM.TMM.AT] 40GBase-KR4 ability */
    CTC_PORT_CL73_40GBASE_CR4     = (1 << 2 ),     /**< [GG.D2.TM.TMM.AT] 40GBase-CR4 ability */
    CTC_PORT_CL73_100GBASE_KR4    = (1 << 3 ),    /**< [GG.D2.TM.TMM.AT] 100GBase-KR4 ability */
    CTC_PORT_CL73_100GBASE_CR4    = (1 << 4 ),    /**< [GG.D2.TM.TMM.AT] 100GBase-CR4 ability */
    CTC_PORT_CL73_FEC_ABILITY     = (1 << 5 ),      /**< [GG.D2.TM.TMM.AT] BASE-R FEC supported*/
    CTC_PORT_CL73_FEC_REQUESTED   = (1 << 6),      /**< [GG.D2.TM.TMM.AT] BASE-R requested */

    CTC_PORT_CL73_25GBASE_KRS                = (1 << 7),  /**< [D2.TM.TMM.AT] 25GBase-KRS ability */
    CTC_PORT_CL73_25GBASE_CRS                = (1 << 7),  /**< [D2.TM.TMM.AT] 25GBase-CRS ability */
    CTC_PORT_CL73_25GBASE_KR                 = (1 << 8),  /**< [D2.TM.TMM.AT] 25GBase-CRS ability */
    CTC_PORT_CL73_25GBASE_CR                 = (1 << 8),  /**< [D2.TM.TMM.AT] 25GBase-CR ability */
    CTC_PORT_CL73_25G_RS_FEC_REQUESTED       = (1 << 9),  /**< [D2.TM.TMM.AT] 25G RS-FEC requested */
    CTC_PORT_CL73_25G_BASER_FEC_REQUESTED    = (1 << 10),  /**< [D2.TM.TMM.AT] 25G BASE-R FEC requested */
    CTC_PORT_CSTM_25GBASE_KR1                = (1 << 11),  /**< [D2.TM.TMM.AT] Consortium mode 25GBase-KR1 ability */
    CTC_PORT_CSTM_25GBASE_CR1                = (1 << 12),  /**< [D2.TM.TMM.AT] Consortium mode 25GBase-CR1 ability */
    CTC_PORT_CSTM_50GBASE_KR2                = (1 << 13),  /**< [D2.TM.TMM.AT] Consortium mode 50GBase-KR2 ability */
    CTC_PORT_CSTM_50GBASE_CR2                = (1 << 14),  /**< [D2.TM.TMM.AT] Consortium mode 50GBase-CR2 ability */
    CTC_PORT_CSTM_RS_FEC_ABILITY             = (1 << 15),  /**< [D2.TM.TMM.AT] Consortium mode RS-FEC ability */
    CTC_PORT_CSTM_BASER_FEC_ABILITY          = (1 << 16),  /**< [D2.TM.TMM.AT] Consortium mode BASE-R FEC ability */
    CTC_PORT_CSTM_RS_FEC_REQUESTED           = (1 << 17),  /**< [D2.TM.TMM.AT] Consortium mode RS-FEC requested */
    CTC_PORT_CSTM_BASER_FEC_REQUESTED        = (1 << 18),  /**< [D2.TM.TMM.AT] Consortium mode BASE-R FEC requested */
    CTC_PORT_CL73_50GBASE_KR                 = (1 << 19),  /**< [TMM.AT] 50GBase-KR ability */
    CTC_PORT_CL73_50GBASE_CR                 = (1 << 20),  /**< [TMM.AT] 50GBase-CR ability */
    CTC_PORT_CL73_100GBASE_KR2               = (1 << 21),  /**< [TMM.AT] 100GBase-KR2 ability */
    CTC_PORT_CL73_100GBASE_CR2               = (1 << 22),  /**< [TMM.AT] 100GBase-CR2 ability */
    CTC_PORT_CL73_200GBASE_KR4               = (1 << 23),  /**< [TMM.AT] 200GBase-KR4 ability */
    CTC_PORT_CL73_200GBASE_CR4               = (1 << 24),  /**< [TMM.AT] 200GBase-CR4 ability */
    CTC_PORT_CSTM_400GBASE_CR8               = (1 << 25),  /**< [TMM.AT] Consortium mode 400GBase-CR8 ability */
    CTC_PORT_CSTM_400GBASE_KR8               = (1 << 25),  /**< [TMM.AT] Consortium mode 400GBase-CR8 ability */
    CTC_PORT_CSTM_LF1_50GR1                  = (1 << 26),  /**< [TMM.AT] Consortium mode 50G-CR1 RS272 FEC ability */
    CTC_PORT_CSTM_LF2_100GR2                 = (1 << 27),  /**< [TMM.AT] Consortium mode 100G-CR2 RS272 FEC ability */
    CTC_PORT_CSTM_LF3_200GR4                 = (1 << 28),  /**< [TMM.AT] Consortium mode 200G-CR4 RS272 FEC ability */
    CTC_PORT_CSTM_LL_RS_FEC_REQ              = (1 << 29),  /**< [TMM.AT] Consortium mode RS272 FEC requested */
    CTC_PORT_CL73_MAX
};
typedef enum ctc_port_cl73_ability_e ctc_port_cl73_ability_t;

enum ctc_port_cl73_ability_ext_e
{
    CTC_PORT_CL73_100GBASE_KR1               = (1 << 0),  /**< [AT] 100GBASE-KR1, CL73 base page ability A16 */
    CTC_PORT_CL73_100GBASE_CR1               = (1 << 1),  /**< [AT] 100GBASE-CR1, CL73 base page ability A16 */
    CTC_PORT_CL73_200GBASE_KR2               = (1 << 2),  /**< [AT] 200GBASE-KR2, CL73 base page ability A17 */
    CTC_PORT_CL73_200GBASE_CR2               = (1 << 3),  /**< [AT] 200GBASE-CR2, CL73 base page ability A17 */
    CTC_PORT_CL73_400GBASE_KR4               = (1 << 4),  /**< [AT] 400GBASE-KR4, CL73 base page ability A18 */
    CTC_PORT_CL73_400GBASE_CR4               = (1 << 5),  /**< [AT] 400GBASE-CR4, CL73 base page ability A18 */
    CTC_PORT_CL73_100G_RS_FEC_INT_REQUESTED  = (1 << 6),  /**< [AT] CL73 extended next page ability D43 */
    CTC_PORT_CSTM_800G_ETC_CR8               = (1 << 7),  /**< [AT] Consortium mode 800G-ETC-CR8 FEC ability */
    CTC_PORT_CSTM_800G_ETC_KR8               = (1 << 8),  /**< [AT] Consortium mode 800G-ETC-KR8 FEC ability */
};
typedef enum ctc_port_cl73_ability_ext_e ctc_port_cl73_ability_ext_t;

enum ctc_port_fec_type_e
{
    CTC_PORT_FEC_TYPE_NONE,          /**< [D2.TM.TMM.AT] FEC OFF, if set, #1)FEC config will ALL be clear
                                                                #2)CL73 Auto-Neg will NOT negotiate FEC abilty */
    CTC_PORT_FEC_TYPE_RS,            /**< [D2.TM.TMM.AT] RS FEC, if set, RS FEC config will be set */
    CTC_PORT_FEC_TYPE_BASER,         /**< [D2.TM.TMM.AT] BASE-R FEC, if set, BASE-R FEC config will be set */
    CTC_PORT_FEC_TYPE_RS528,         /**< [TMM.AT] RS(528,514) */
    CTC_PORT_FEC_TYPE_RS544,         /**< [TMM.AT] RS(544,514) */
    CTC_PORT_FEC_TYPE_RS272,         /**< [TMM.AT] RS(272,257) */
    CTC_PORT_FEC_TYPE_FC2112,        /**< [TMM.AT] FC(2112,2080) */
    CTC_PORT_FEC_TYPE_RS544_INT,      /**< [AT] RS(544,514) Interleave, only for 100GR1 */
    CTC_PORT_FEC_TYPE_RS272_INT,      /**< [AT] RS(272,257) Interleave, only for 100GR1 */
    CTC_PORT_FEC_TYPE_MAX
};
typedef enum ctc_port_fec_type_e ctc_port_fec_type_t;
enum ctc_port_auto_neg_mode_e
{
    CTC_PORT_AUTO_NEG_MODE_NONE,                  /**< [GG.D2.TM.TMM.TMA.AT] Default Auto-neg mode */
    CTC_PORT_AUTO_NEG_MODE_1000BASE_X = CTC_PORT_AUTO_NEG_MODE_NONE,             /**< [GB.GG.D2.TM.TMM.TMA] 1000BASE-X Auto-neg mode */
    CTC_PORT_AUTO_NEG_MODE_SGMII_MASTER,          /**< [GB.GG.D2.TM.TMM.TMA.AT] SGMII master Auto-neg mode */
    CTC_PORT_AUTO_NEG_MODE_SGMII_SLAVER,          /**< [GB.GG.D2.TM.TMM.TMA.AT] SGMII slaver Auto-neg mode */
    CTC_PORT_AUTO_NEG_MODE_OVER_CLOCK,            /**< [GG.D2.TM.TMM.TMA.AT] At over-clock rate Over clock auto-neg mode */
    CTC_PORT_AUTO_NEG_MODE_MAX_MODE
};
typedef enum ctc_port_auto_neg_mode_e ctc_port_auto_neg_mode_t;

/**
 @brief Port station move action type
*/
enum ctc_port_station_move_action_type_e
{
    CTC_PORT_STATION_MOVE_ACTION_TYPE_FWD,                      /**< [GB.GG.D2.TM.TMM.TMA.AT] Packet will forwarding if station move */
    CTC_PORT_STATION_MOVE_ACTION_TYPE_DISCARD,                /**< [GB.GG.D2.TM.TMM.TMA.AT] Packet will discard if station move */
    CTC_PORT_STATION_MOVE_ACTION_TYPE_DISCARD_TOCPU,     /**< [GB.GG.D2.TM.TMM.TMA.AT] Packet will discard and redirect to cpu if station move */
    CTC_PORT_STATION_MOVE_ACTION_TYPE_MAX
};
typedef enum ctc_port_station_move_action_type_e ctc_port_station_move_action_type_t;


enum ctc_port_wlan_port_type_e
{
    CTC_PORT_WLAN_PORT_TYPE_NONE ,                                       /**< [D2.TM] Disable wlan port type */
    CTC_PORT_WLAN_PORT_TYPE_DECAP_WITH_DECRYPT ,             /**< [D2.TM] The port can support the processing plaintext and encrypted packet */
    CTC_PORT_WLAN_PORT_TYPE_DECAP_WITHOUT_DECRYPT ,       /**< [D2.TM] The port only support the processing plaintext*/
    CTC_PORT_WLAN_PORT_TYPE_TYPE_MAX
};
typedef enum ctc_port_wlan_port_type_e ctc_port_wlan_port_type_t;

enum ctc_port_sd_action_type_e
{
    CTC_PORT_SD_ACTION_TYPE_NONE,
    CTC_PORT_SD_ACTION_TYPE_DISCARD_OAM,             /**< [D2.TM.TMM.AT] Signal Degrade, discard oam pkt */
    CTC_PORT_SD_ACTION_TYPE_DISCARD_DATA,            /**< [D2.TM.TMM.AT] Signal Degrade, discard data pkt */
    CTC_PORT_SD_ACTION_TYPE_DISCARD_BOTH,            /**< [D2.TM.TMM.AT] Signal Degrade, discard oam and data pkt */
    CTC_PORT_WLAN_PORT_TYPE_MAX
};
typedef enum ctc_port_sd_action_type_e ctc_port_sd_action_type_t;

#define CTC_PORT_FEC_CW_SYM_ERR_NUM  16
#define CTC_PORT_FEC_MAX_PCSL_NUM 32
struct ctc_port_fec_cnt_s
{
    uint32 correct_cnt;     /**< [TM.TMM.AT] Detect error and do correct FEC codeword count*/
    uint32 uncorrect_cnt;   /**< [TM.TMM.AT] Detect error and do not correct FEC codeword count */
    uint32 sym_err_cnt[CTC_PORT_FEC_CW_SYM_ERR_NUM];  /**< [AT] RS-FEC CW counter of symbol-error-n */
    uint32 pcsl_sym_err_cnt[CTC_PORT_FEC_MAX_PCSL_NUM];   /**< [AT] RS-FEC symbol error counter per PCSL */
};
typedef struct ctc_port_fec_cnt_s ctc_port_fec_cnt_t;

#define CTC_PORT_FEC_SYN_BMP_CNT 3
/**
 @brief Port fec error injection
*/
struct ctc_port_fec_err_inject_s
{
    uint32 sym_bmp[CTC_PORT_FEC_SYN_BMP_CNT];     /**< [AT] Symbol bitmap bits*/
    uint8 mode;                                   /**< [AT] 0:once 1:all*/
    uint8 sym_bmp_num;                            /**< [AT] Symbol bitmap number*/
    uint8 enable;                                 /**< [AT] 0~disable 1~enable  */
    uint8 encode_id;                              /**< [AT] For 200/400G 0 or 1, for 800G 0~3, for 25/50/100G no effect */
};
typedef struct ctc_port_fec_err_inject_s ctc_port_fec_err_inject_t;

/**
  @brief Port fault flags
*/
#define CTC_PORT_FAULT_LOCAL  (1 << 0 )     /**< [TM.TMM.AT] Port local fault */
#define CTC_PORT_FAULT_REMOTE (1 << 1 )     /**< [TM.TMM.AT] Port remote fault */
#define CTC_PORT_FAULT_LINK   (1 << 2 )     /**< [TM.TMM.AT] Port link fault */
#define CTC_PORT_FAULT_FORCE  (1 << 3 )     /**< [TM.TMM.AT] Port force fault */

/**
  @brief Port link info
*/
struct ctc_port_link_info_s
{
    uint8   is_link_up;                             /**< [TMM.AT][RO] Link status, include fault status */
    uint8   mac_link_status;                        /**< [TMM.AT][RO] Mac link status, without fault status */
    uint8   pcs_link_status;                        /**< [TMM.AT][RO] Pcs link status */
    uint8   unidir_en;                              /**< [TMM.AT] Unidirection */
    uint8   fault;                                  /**< [TMM.AT] Fault status, refer to CTC_PORT_FAULT_XX flags */
    uint8   signal_detect;                          /**< [TMM.AT][RO] Signal detect */
    uint8   serdes_ready;                           /**< [TMM.AT][RO]serdes ready status */
    uint16  link_filter;                            /**< [TMM.AT] Link filter time. 0:disable. unit:ms */
    uint16  fault_filter;                           /**< [TMM.AT] Fault filter time. 0:disable. unit:ms */
    uint32  pcs_err_cnt[CTC_PORT_SERDES_MAX_NUM];   /**< [TM.TMM.AT] code error count */

};
typedef struct ctc_port_link_info_s ctc_port_link_info_t;

/**
  @brief Port xpipe type: CTC_PORT_XPIPE_TYPE_0 mean disable xpipe feature, else mean enable xpipe feature
*/
enum ctc_port_xpipe_type_e
{
    CTC_PORT_XPIPE_TYPE_0,        /**< [TM.TMM.AT] Disable */
    CTC_PORT_XPIPE_TYPE_1,        /**< [TM.TMM] Classify incoming pkt with preamble*/
    CTC_PORT_XPIPE_TYPE_2,        /**< [TMM.AT] Classify incoming pkt with fields*/
    CTC_PORT_XPIPE_TYPE_3,        /**< [TM.TMM] Classify incoming pkt with preamble, and disable Emac port parser*/
    CTC_PORT_XPIPE_TYPE_4,        /**< [TM.TMM.AT] High priority only*/
    CTC_PORT_XPIPE_TYPE_5,        /**< [TM.TMM.AT] Low priority only*/
    CTC_PORT_XPIPE_TYPE_6,        /**< [TMM.AT] CTC_PORT_XPIPE_TYPE_2, for TMM   : RX only
                                                                       for Arctic: Low priority only*/
    CTC_PORT_XPIPE_TYPE_MAX,
};
typedef enum ctc_port_xpipe_type_e ctc_port_xpipe_type_t;

/**
  @brief Port property flags
*/
enum ctc_port_property_e
{
    /**< genernal property */
    CTC_PORT_PROP_MAC_EN,                         /**< [GB.GG.D2.TM.TMM.TMA.AT] Port mac enable*/
    CTC_PORT_PROP_PORT_EN,                        /**< [GB.GG.D2.TM.TMM.AT] Port whether the port is enable,
                                                                            the following properties will be set:
                                                                            CTC_PORT_PROP_TRANSMIT_EN,
                                                                            CTC_PORT_PROP_RECEIVE_EN and CTC_PORT_PROP_BRIDGE_EN*/
    CTC_PORT_PROP_LINK_UP,                        /*<  [GB.GG.D2.TM.TMM.TMA.AT] Port link up status */
    CTC_PORT_PROP_VLAN_CTL,                      /**< [GB.GG.D2.TM.TMM.TMA.AT] Port's vlan tag control mode*/
    CTC_PORT_PROP_DEFAULT_VLAN,              /**< [GB.GG.D2.TM.TMM.TMA.AT] Default vlan id, the following properties will be set: untag_default_svlan = 1,untag_default_vlanId = 1,
                                                                           DsPhyPortExt_DefaultVlanId_f and DsDestPort_DefaultVlanId_f*/
    CTC_PORT_PROP_UNTAG_PVID_TYPE,         /**< [GB.GG.D2.TM.TMM.AT] Untag default vlan type. refer CTC_PORT_UNTAG_PVID_TYPE_XXX */
    CTC_PORT_PROP_VLAN_DOMAIN,               /**< [GB.GG.D2.TM.TMM.TMA.AT] Vlan domain of the port */

    CTC_PORT_PROP_PROTOCOL_VLAN_EN,               /**< [GB.GG.D2.TM.TMM.AT] Protocol vlan enable*/
    CTC_PORT_PROP_QOS_POLICY,                          /**< [GB.GG.D2.TM.TMM.TMA.AT] QOS policy*/
    CTC_PORT_PROP_DEFAULT_PCP,                         /**< [GB.GG.D2.TM.TMM.TMA.AT] Default PCP*/
    CTC_PORT_PROP_DEFAULT_DEI,                         /**< [GB.GG.D2.TM.TMM.TMA.AT] Default DEI*/
    CTC_PORT_PROP_SCL_USE_DEFAULT_LOOKUP,    /**< [GB.GG.D2.TM.TMM.AT] SCL default vlan lookup*/
    CTC_PORT_PROP_SCL_IPV4_LOOKUP_EN,            /**< [GB] SCL ipv4 lookup enable*/
    CTC_PORT_PROP_SCL_IPV6_LOOKUP_EN,            /**< [GB] SCL ipv6 lookup enable*/
    CTC_PORT_PROP_SCL_FORCE_IPV4_TO_MAC,      /**< [GB] Force Ipv4 packet go against MAC SCL entry*/
    CTC_PORT_PROP_SCL_FORCE_IPV6_TO_MAC,      /**< [GB] Force Ipv6 packet go against MAC SCL entry*/
    CTC_PORT_PROP_NVGRE_MCAST_NO_DECAP,      /**< [GG.D2.TM.TMM.AT] NvGRE mcast packet do not decapsulation*/
    CTC_PORT_PROP_VXLAN_MCAST_NO_DECAP,      /**< [GG.D2.TM.TMM.AT] VxLAN mcast packet do not decapsulation*/
    CTC_PORT_PROP_IP_TUNNEL_MCAST_NO_DECAP, /**< [D2.TM.TMM.AT] Ip tunnel mcast packet do not decapsulation*/ 
    CTC_PORT_PROP_PTP_EN,                        /**< [GB.GG.D2.TM.TMM.AT] Set ptp clock id, refer to ctc_ptp_clock_t */
    CTC_PORT_PROP_PTP_DOMAIN_ID,           /**< [AT] Select ptp domain id, 0 and 1 are valid */

    CTC_PORT_PROP_SPEED,                                  /**< [GB.GG.D2.TM.TMM.TMA.AT] Port speed*/
    CTC_PORT_PROP_MAX_FRAME_SIZE,                 /**< [GB.GG.D2.TM.TMM.TMA.AT] Max frame size*/
    CTC_PORT_PROP_MIN_FRAME_SIZE,                 /**< [GB.GG.D2.TM.TMM.AT] Min frame size*/
    CTC_PORT_PROP_PREAMBLE,                           /**< [GB.GG.D2.TM.TMM.TMA.AT] Preamble value*/
    CTC_PORT_PROP_PADING_EN,                          /**< [GB.GG.D2.TM.TMM.AT] Pading enable*/
    CTC_PORT_PROP_STRETCH_MODE_EN,              /**< [GB] Port stretch mode enable*/
    CTC_PORT_PROP_IPG,                                     /**< [GB.GG.D2.TM.TMM.TMA.AT] Ipg index per port*/
    CTC_PORT_PROP_RX_PAUSE_TYPE,                  /**< [GB.GG] Set port rx pause type, normal or pfc*/
    CTC_PORT_PROP_MAC_TS_EN,                         /**< [GB.TMM.AT] Enable Mac for append time-stamp */
    CTC_PORT_PROP_ERROR_CHECK,                     /**< [GB.GG.D2.TM] Mac CRC check, 1:enable, 0:disable */
    CTC_PORT_PROP_MAC_TX_IPG,                       /**< [GB.GG.D2.TM.TMM.AT] Mac tx ipg size, the value must be 8bytes or 12bytes(default) */
    CTC_PORT_PROP_OVERSUB_PRI,                     /**< [GG] Oversubscription port bandwidth guarantee priority, oversubscription allows ingress ports bandwidth
                                                                                greater than the core bandwidth of the device and per port set bandwidth guarantee priority, for GG: 0-low,1-high, Default is 0 */

    CTC_PORT_PROP_TRANSMIT_EN,                    /**< [GB.GG.D2.TM.TMM.AT] Tx enable*/
    CTC_PORT_PROP_RECEIVE_EN,                      /**< [GB.GG.D2.TM.TMM.AT] Rx enable*/
    CTC_PORT_PROP_BRIDGE_EN,                       /**< [GB.GG.D2.TM.TMM.AT] Bridge enable in both direction*/
    CTC_PORT_PROP_LEARNING_EN,                    /**< [GB.GG.D2.TM.TMM.TMA.AT] Learning enable*/
    CTC_PORT_PROP_PRIORITY_TAG_EN,             /**< [GB.GG.D2.TM.TMM.TMA.AT] Priority tag enable*/

    CTC_PORT_PROP_CROSS_CONNECT_EN,               /**< [GB.GG.D2.TM.TMM.AT] Port cross connect*/
    CTC_PORT_PROP_DOT1Q_TYPE,                           /**< [GB.GG.D2.TM.TMM.AT] Dot1q type*/
    CTC_PORT_PROP_USE_OUTER_TTL,                       /**< [GB.GG.D2.TM.TMM.AT] Use outer ttl in case of tunnel*/
    CTC_PORT_PROP_DISCARD_NON_TRIL_PKT,          /**< [GB.GG.D2.TM.TMM.AT] Discard non-trill pkg enable*/
    CTC_PORT_PROP_DISCARD_TRIL_PKT,                  /**< [GB.GG.D2.TM.TMM.AT] Discard trill pkg enable*/
    CTC_PORT_PROP_SRC_DISCARD_EN,                    /**< [GB.GG.D2.TM.TMM.AT] Port whether the srcdiscard is enable*/
    CTC_PORT_PROP_PORT_CHECK_EN,                     /**< [GB.GG.D2.TM.TMM.AT] Port port check enable*/
    CTC_PORT_PROP_RAW_PKT_TYPE,                       /**< [GB.GG.D2.TM.TMM.AT] Raw packet type*/

    CTC_PORT_PROP_REFLECTIVE_BRIDGE_EN,           /**< [GB.GG.D2.TM.TMM.AT] Bridge to the same port enable*/
    CTC_PORT_PROP_HW_LEARN_EN,                         /**< [GB.GG.D2.TM.TMM.AT] Hw learning enable*/
    CTC_PORT_PROP_TRILL_EN,                                 /**< [GB.GG.D2.TM.TMM.AT] Trill enable*/
    CTC_PORT_PROP_TRILL_MCAST_DECAP_EN,           /**< [GG.D2.TM.TMM.AT] Trill mcast decap when enable*/
    CTC_PORT_PROP_FCOE_EN,                                  /**< [GB.GG.D2.TM.TMM.AT] FCOE enable*/
    CTC_PORT_PROP_RPF_EN,                                    /**< [GB.GG.D2.TM.TMM.AT] RPF enable*/
    CTC_PORT_PROP_FCMAP,                                     /**< [GG.D2.TM.TMM.AT] Fcoe FCMAP(0x0EFC00-0x0EFCFF), default is 0x0EFC00 */
    CTC_PORT_PROP_REPLACE_STAG_COS,                 /**< [GB.GG.D2.TM.TMM.TMA.AT] The STAG COS field is replaced by the classified COS result*/
    CTC_PORT_PROP_REPLACE_STAG_TPID,                /**< [GG.D2.TM.TMM.AT] The STAG TPID is replaced by the vlanXlate TPID result*/
    CTC_PORT_PROP_REPLACE_CTAG_COS,                /**< [GB.GG.D2.TM.TMM.TMA.AT] The STAG COS field is replaced by the classified COS result*/
    CTC_PORT_PROP_REPLACE_DSCP_EN,                  /**< [GB.GG.D2.TM.TMM.TMA.AT] The dscp field is replaced by the classified qos result, D2 replaced by CTC_PORT_PROP_DSCP_SELECT_MODE*/

    CTC_PORT_PROP_L3PDU_ARP_ACTION,                /**< [GB.GG.D2.TM.TMM.AT] L3PDU arp action*/
    CTC_PORT_PROP_L3PDU_DHCP_ACTION,             /**< [GB.GG.D2.TM.TMM.AT] L3PDU dhcp action*/
    CTC_PORT_PROP_L3PDU_DHCP_V6_ACTION,          /**< [D2.TM.TMM.AT] L3PDU dhcp v6 action*/
    CTC_PORT_PROP_TUNNEL_RPF_CHECK,               /**< [GB.GG.D2.TM.TMM.AT] Tunnel RPF check enable*/
    CTC_PORT_PROP_RPF_TYPE,                              /**< [GB.GG.D2.TM.TMM.AT] RPF type, refer to ctc_port_rpf_type_t */
    CTC_PORT_PROP_IS_LEAF,                                /**< [GB.GG.D2.TM.TMM.AT] The port connect with a leaf node*/
    CTC_PORT_PROP_PKT_TAG_HIGH_PRIORITY,       /**< [GB.GG.D2.TM.TMM.AT] Packet tag take precedence over all*/
    CTC_PORT_PROP_ROUTE_EN,                             /**< [GB.GG.D2.TM.TMM.AT] Enable route on port */

    CTC_PORT_PROP_AUTO_NEG_EN,                       /**< [GB.GG.D2.TM.TMM.TMA.AT] Enable Auto-neg on port */
    CTC_PORT_PROP_AUTO_NEG_MODE,                  /**< [GB.GG.D2.TM.TMM.TMA.AT] Config Auto-neg mode on port */
    CTC_PORT_PROP_CL73_ABILITY,                       /**< [GG.D2.TM.TMM.AT] Cfg cl73 ability */
    CTC_PORT_PROP_FEC_EN,                                /**< [GG.D2.TM.TMM.AT] Enable FEC, mac must be disable */
    CTC_PORT_PROP_LINK_INTRRUPT_EN,                /**< [GB.GG.D2.TM.TMM.TMA.AT] Enable Mac PCS link interrupt */
    CTC_PORT_PROP_UNIDIR_EN,                       /**< [GB.GG.D2.TM.TMM.TMA.AT] Enable fiber unidirection */
    CTC_PORT_PROP_CUT_THROUGH_EN,                  /**< [GG.D2.TM.TMM.AT] Enable cut through */
    CTC_PORT_PROP_PAR_DET_EN,                      /**< [TM.TMM.AT] Parallel detection enable */

    CTC_PORT_PROP_LINKSCAN_EN,                       /**< [GB.AT] Enable linkscan funciton on port*/
    CTC_PORT_PROP_APS_FAILOVER_EN,                /**< [GB.GG.D2.TM.TMM] Enable Aps-failover on port*/
    CTC_PORT_PROP_LINKAGG_FAILOVER_EN,         /**< [GB.GG.D2.TM] Enable Linkagg-failover on port*/
    CTC_PORT_PROP_SCL_HASH_FIELD_SEL_ID,     /**< [GG.D2.TM.TMM.AT] SCL flow hash field sel id */
    CTC_PORT_PROP_APS_SELECT_GRP_ID,            /**< [GG.D2.TM.TMM.AT] The aps select group id, 0xFFFFFFFF means disable aps select*/
    CTC_PORT_PROP_APS_SELECT_WORKING,         /**< [GG.D2.TM.TMM.AT] Indicate the flow is working path or protecting path*/

    CTC_PORT_PROP_SNOOPING_PARSER,                         /**< [GG.D2.TM.TMM.AT] Enable parser tunnel payload even no tunnel decap */
    CTC_PORT_PROP_FLOW_LKUP_BY_OUTER_HEAD,         /**< [GG.D2.TM.TMM.AT] If set,indicate tunnel packet will use outer header to do ACL/IPFIX flow lookup */
    CTC_PORT_PROP_AWARE_TUNNEL_INFO_EN,            /**< [GG.D2.TM.TMM.AT] If set, indicate use pkt inner info as lookup key, and outer l4 info can also be used as lookup key */
    CTC_PORT_PROP_NVGRE_ENABLE,                   /**< [GG.D2.TM.TMM.AT] Enable nvgre */

    CTC_PORT_PROP_METADATA_OVERWRITE_PORT,        /**< [GG.D2] Enable metadata overwrite port */
    CTC_PORT_PROP_METADATA_OVERWRITE_UDF,         /**< [GG] Enable metadata overwrite udf */

    CTC_PORT_PROP_SIGNAL_DETECT,                            /**< [GG.D2.TM.TMM.AT] Signal detect on port */

    CTC_PORT_PROP_SRC_MISMATCH_EXCEPTION_EN,      /**< [GB.GG.D2.TM.TMM.AT] Enable station move to cpu */
    CTC_PORT_PROP_STATION_MOVE_PRIORITY,               /**< [GB.GG.D2.TM.TMM.AT] Station move priority: 0-low,1-high, Default is 0 */
    CTC_PORT_PROP_STATION_MOVE_ACTION,                  /**< [GB.GG.D2.TM.TMM.TMA.AT] Station move action, refer to ctc_port_station_move_action_type_t */
    CTC_PORT_PROP_EFD_EN,                                          /**< [GG.D2.TM.TMM.AT] Enable EFD */
    CTC_PORT_PROP_EEE_EN,                                          /**< [GB.GG.TMA] Enable eee on port*/

    CTC_PORT_PROP_LOGIC_PORT,                     /**< [GB.GG.D2.TM.TMM.AT] Port logic port value. if set 0, mean logic port disable */
    CTC_PORT_PROP_GPORT,                          /**< [D2.TM.TMM.AT] Set port gport value. */
    CTC_PORT_PROP_ADD_DEFAULT_VLAN_DIS,           /**< [GB.GG.D2.TM.TMM.AT] Will not add default vlan for untagged packet */
    CTC_PORT_PROP_IPFIX_LKUP_BY_OUTER_HEAD,       /**< [D2.TM.TMM.AT] If set,indicate tunnel packet will use outer header to do IPFIX flow lookup */
    CTC_PORT_PROP_IPFIX_AWARE_TUNNEL_INFO_EN,     /**< [D2.TM.TMM.AT] If set, indicate ipfix lookup key use innner info as key, and outer tunnel info can also be used as lookup key */
    CTC_PORT_PROP_CID,                            /**< [D2.TM.TMM.AT] Ingress Category Id*/
    CTC_PORT_PROP_TX_CID_HDR_EN,                  /**< [D2.TM.TMM.AT] Tx Packet with cid header.*/
    CTC_PORT_PROP_WLAN_PORT_TYPE,                 /**< [D2.TM] WLAN port type, refer to ctc_port_wlan_port_type_t */
    CTC_PORT_PROP_WLAN_PORT_ROUTE_EN,             /**< [D2.TM] Enable inner packet route on the wlan port */
    CTC_PORT_PROP_WLAN_DECAP_WITH_RID,            /**< [D2.TM] If not zero means radio id used as key of WLAN decap */
    CTC_PORT_PROP_DSCP_SELECT_MODE,               /**< [D2.TM.TMM.TMA.AT] [Egress]Dscp select mode, refer to ctc_dscp_select_mode_t */
    CTC_PORT_PROP_DEFAULT_DSCP,                   /**< [D2.TM.TMM.TMA.AT] [Egress]Default DSCP, if DSCP_SELECT_MODE is CTC_DSCP_SELECT_ASSIGN, the default dscp will rewrite packet's dscp */
    CTC_PORT_PROP_REPLACE_PCP_DEI,                /**< [D2.TM.TMM.TMA.AT] [Egress]The classified PCP/DEI is replaced by the Default PCP/DEI */
    CTC_PORT_PROP_LOGIC_PORT_CHECK_EN,            /**< [D2.TM.TMM.AT] [Egress]Port logic port check enable */
    CTC_PORT_PROP_LOOP_WITH_SRC_PORT,             /**< [GG.D2.TM.TMM.AT] If set, indicate the loop packet will take source port back, or used for taking source port to CPU */

    CTC_PORT_PROP_BPE_PORT_TYPE,                  /**< [D2.TM.TMM] BPE(Bridge port extend) port type, refer to ctc_port_bpe_extend_type_t*/
    CTC_PORT_PROP_BPE_NAMESPACE,                  /**< [D2.TM.TMM] BPE port namespace which is used to differentiate same extend vlan*/
    CTC_PORT_PROP_BPE_EXTEND_VLAN,                /**< [D2.TM.TMM] BPE extend vlan*/
    CTC_PORT_PROP_SD_ACTION,                      /**< [D2.TM.TMM.AT] Port enable Singal Degrade, refer to ctc_port_sd_action_type_t*/

    CTC_PORT_PROP_LB_HASH_ECMP_PROFILE,           /**< [TM.TMM.AT] Port sel hash offset profile id for ecmp or packet head, refer to ctc_lb_hash_offset_t */
    CTC_PORT_PROP_LB_HASH_LAG_PROFILE,	          /**< [TM.TMM.AT] Port sel hash offset profile id for linkagg, refer to ctc_lb_hash_offset_t */
    CTC_PORT_PROP_LB_HASH_PROFILE,                /**< [TM.TMM.AT] Replace of CTC_PORT_PROP_LB_HASH_ECMP_PROFILE and CTC_PORT_PROP_LB_HASH_LAG_PROFILE,
                                                                   ecmp and linkagg use same profile, ext_data: ctc_lb_hash_offset_t */
    CTC_PORT_PROP_LB_HASH_VALUE,                  /**< [TM.TMM.AT] Port lb-hash value, only use for stacking*/

    CTC_PORT_PROP_LEARN_DIS_MODE,                 /**< [TM] Learn disable mode: 1-learn disable with mac sa lookup, 0-learn disable with no mac sa lookup */
    CTC_PORT_PROP_FORCE_MPLS_EN,                  /**< [TM.TMM.AT] Force MPLS packet decap */
    CTC_PORT_PROP_FORCE_TUNNEL_EN,                /**< [TM.TMM.AT] Force Tunnel packet decap */
    CTC_PORT_PROP_DISCARD_UNENCRYPT_PKT,          /**< [TM] Discard unencrypted packet, except for some special packets */
    CTC_PORT_PROP_DENY_LEARNING,                  /**< [TMM.AT] Deny Learning */
    CTC_PORT_PROP_UDF_CLASSID,                    /**< [TMM.AT] UDF Classid*/
    CTC_PORT_PROP_XPIPE_EN,                       /**< [TM.TMM.AT] Enable/disable XPIPE feature */
    CTC_PORT_PROP_XPIPE_MODE,                     /**< [TMM.AT] Config XPIPE mode, refer to ctc_register_xpipe_mode_s */
    CTC_PORT_PROP_FAST_PFC_EN,                    /**< [AT] Enable/disable fast pfc feature */
    CTC_PORT_PROP_QOS_WRR_EN,                     /**< [D2.TM.TMM.TMA.AT] Enable/disable WRR mode*/

    CTC_PORT_PROP_ESID,                           /**< [TM.TMM.AT]    Evpn EsId*/
    CTC_PORT_PROP_ESLB,                           /**< [TM.TMM.AT]    Evpn EsLabel*/
    CTC_PORT_PROP_SWAP_CHANNEL,                   /**< [TM.TMM.AT] Source port and destinaion port exchane each other*/
    CTC_PORT_PROP_OBM_DSCP_DOMAIN,                /**< [D2.TM.TMM.AT] OBM DSCP domain*/
    CTC_PORT_PROP_OBM_COS_DOMAIN,                 /**< [D2.TM.TMM.AT] OBM COS domain*/
    CTC_PORT_PROP_OBM_POLICY,                     /**< [D2.TM.TMM.AT] OBM policy*/
    CTC_PORT_PROP_OBM_DEFAULT_PCP,                /**< [D2.TM.TMM.AT] OBM default PCP*/
    CTC_PORT_PROP_NSH_SI_CHECK,                   /**< [AT] Check nsh si is equal to 0 or not */
    CTC_PORT_PROP_PP_ID,                          /**< [AT] Pipeline id, only for get api*/
    CTC_PORT_PROP_TRUNCATION_EN,                  /**< Enable/disable truncation*/

    /* Mac Property */
    CTC_PORT_PROP_CHK_CRC_EN = 1000,              /**< [D2.TM.TMM.TMA.AT] Packet check RX CRC Enable*/
    CTC_PORT_PROP_STRIP_CRC_EN,                   /**< [D2.TM.TMM.TMA.AT] Packet strip TX CRC Enable*/
    CTC_PORT_PROP_APPEND_CRC_EN,                  /**< [D2.TM.TMM.TMA.AT] Packet append TX CRC Enable*/
    CTC_PORT_PROP_APPEND_TOD_EN,                  /**< [D2.TM.TMM.AT] Packet append RX tod Enable*/

    CTC_PORT_PROP_AUTO_NEG_FEC,                   /**< [D2.TM.TMM.AT] Config Auto-neg FEC ability on port, refer to 'ctc_port_fec_type_t'
                                                            set value 0 -- disable Auto-Neg FEC ability;
                                                            set value 1 -- enable Auto-Neg FEC RS type ability;
                                                            set value 2 -- enable Auto-Neg FEC Base-R type ability;
                                                            set other value -- return error */
    CTC_PORT_PROP_INBAND_CPU_TRAFFIC_EN,          /**< [D2.TM.TMM.AT] Set port inband CPU traffic enable, only used for WDM Pon*/
    CTC_PORT_PROP_MUX_TYPE,                       /**< [GG.D2.TM.TMM.AT] Set packet encap format for ingress port identify, refer to ctc_port_mux_type_t */
    CTC_PORT_PROP_HMAC_EN,                        /**< [TMM] Enable/disable HMAC */
    CTC_PORT_PROP_CLOUDSEC_EN,                    /**< [TMM.AT] Enable/disable CLOUDSEC */
    CTC_PORT_PROP_SELECT_MAX_SCL_PRIO_EN,         /**< [TMM.AT] Enable select max scl priority */
    CTC_PORT_PROP_STK_GRP_ID,                     /**< [D2.TM.TMM.AT] Config stacking trunk select group id for ucast path select when select_mode == 1 */
    CTC_PORT_PROP_FEC_CNT,                        /**< [TM.TMM.AT] [out] FEC count, refer to ctc_port_fec_cnt_t*/
    CTC_PORT_PROP_SFD_EN,                         /**< [D2.TM.TMM.AT] Disable: 0x5d(sfd) centec mode, use for centec stacking ports interconnect,
                                                                   enable: 0xd5(sfd) normal mode, use for normal ports interconnect(default)*/
    CTC_PORT_PROP_FAULT,                          /**< [TM.TMM.AT] Fault status, refer to CTC_PORT_FAULT_XX flags */
    CTC_PORT_PROP_LINK_INFO,                      /**< [TMM.AT] Port link info, refert to ctc_port_link_info_t */
    CTC_PORT_PROP_HALF_DUPLEX,                    /**< [TMA] Half duplex*/
    CTC_PORT_PROP_NEW_SA_DROP,                    /**< [TMA] New mac sa drop*/
    CTC_PORT_PROP_FEC_ERR_INJECT,                 /**< [AT] Fec error inject*/
    /* Phy property*/
    CTC_PORT_PROP_PHY_INIT = 1990,          /**< [D2.TM.TMM.TMA.AT] Phy port init*/
    CTC_PORT_PROP_PHY_EN,                   /**< [D2.TM.TMM.TMA.AT] Phy port enable*/
    CTC_PORT_PROP_PHY_DUPLEX,               /**< [D2.TM.TMM.TMA.AT] Phy duplext*/
    CTC_PORT_PROP_PHY_MEDIUM,               /**< [D2.TM.TMM.TMA.AT] Phy medium*/
    CTC_PORT_PROP_PHY_LOOPBACK,             /**< [D2.TM.TMM.TMA.AT] Phy loopback*/
    CTC_PORT_PROP_PHY_AUTO_NEG_EN,          /**< [D2.TM.TMM.TMA.AT] Phy auto neg enable*/
    CTC_PORT_PROP_PHY_SPEED,                /**< [D2.TM.TMM.TMA.AT] Phy port speed*/
    CTC_PORT_PROP_PHY_CUSTOM_BASE = 2000,
    CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE = 2100,

    MAX_CTC_PORT_PROP_NUM
};
typedef enum ctc_port_property_e  ctc_port_property_t;

/**
  @brief Port property flags with direction
*/
enum ctc_port_direction_property_e
{
    CTC_PORT_DIR_PROP_VLAN_FILTER_EN = MAX_CTC_PORT_PROP_NUM, /**< [GB.GG.D2.TM.TMM.TMA.AT] Vlan filter enable*/
    CTC_PORT_DIR_PROP_RANDOM_LOG_EN,                  /**< [GB.GG.D2.TM.TMM.AT] Random log enable*/
    CTC_PORT_DIR_PROP_RANDOM_LOG_PERCENT,         /**< [GB.GG.D2.TM.TMM.AT] Percent of random threshold*/
    CTC_PORT_DIR_PROP_RANDOM_LOG_RATE,               /**< [GB.GG.D2.TM.TMM.AT] Rate of random threshold,
                                                          for GG,D2,TM max rate = 0x7fff, percent = (rate << shift)/(0xfffff), shift default: 5;
                                                          from TMM max rate = 0x7fff, percent = ((rate << shift)+1)/(0x3fffff), shift default: 7;
                                                          for GB max rate = 0x7fff, percent = rate / 0x7fff */

    CTC_PORT_DIR_PROP_QOS_DOMAIN,                        /**< [GB.GG.D2.TM.TMM.TMA.AT] QOS domain*/
    CTC_PORT_DIR_PROP_QOS_COS_DOMAIN,                /**< [D2.TM.TMM.AT] QOS COS domain*/
    CTC_PORT_DIR_PROP_QOS_DSCP_DOMAIN,               /**< [D2.TM.TMM.AT] QOS DSCP domain*/

    CTC_PORT_DIR_PROP_PORT_POLICER_VALID,            /**< [GB.GG.TMA] Policer valid*/
    CTC_PORT_DIR_PROP_STAG_TPID_INDEX,                 /**< [GB.GG.D2.TM.TMM.AT] Stag TPID index*/

    CTC_PORT_DIR_PROP_ACL_EN,                                /**< [GB.GG.D2.TM] Port acl enable, refer CTC_ACL_EN_XXX */
    CTC_PORT_DIR_PROP_ACL_CLASSID,                        /**< [GB.GG.D2.TM.TMM.AT] Port acl classid */
    CTC_PORT_DIR_PROP_ACL_CLASSID_0,                    /**< [GG.D2.TM.TMM.AT] Port acl0 classid */
    CTC_PORT_DIR_PROP_ACL_CLASSID_1,                    /**< [GG.D2.TM.TMM.AT] Port acl1 classid */
    CTC_PORT_DIR_PROP_ACL_CLASSID_2,                    /**< [GG.D2.TM.TMM.AT] Port acl2 classid */
    CTC_PORT_DIR_PROP_ACL_CLASSID_3,                    /**< [GG.D2.TM.TMM.AT] Port acl3 classid */
    CTC_PORT_DIR_PROP_ACL_IPV4_FORCE_MAC,          /**< [GB] Ipv4-packet force use mac-key */
    CTC_PORT_DIR_PROP_ACL_IPV6_FORCE_MAC,          /**< [GB] Ipv6-packet force use mac-key */
    CTC_PORT_DIR_PROP_ACL_FORCE_USE_IPV6,           /**< [GB] Force use ipv6 key */
    CTC_PORT_DIR_PROP_ACL_USE_CLASSID,                 /**< [GB.GG.D2.TM.TMM.AT] Use acl classid not bitmap*/
    CTC_PORT_DIR_PROP_ACL_HASH_FIELD_SEL_ID,       /**< [GG.D2.TM.TMM.AT] Hash field sel id */
    CTC_PORT_DIR_PROP_SERVICE_ACL_EN,                   /**< [GB.GG] Service acl enable */
    CTC_PORT_DIR_PROP_ACL_HASH_LKUP_TYPE,           /**< [GG.D2.TM.TMM.AT] Acl hash type. refer CTC_ACL_HASH_LKUP_TYPE_XXX */
    CTC_PORT_DIR_PROP_ACL_TCAM_LKUP_TYPE_0,        /**< [GG.D2.TM.TMM.AT] Acl tcam type. refer CTC_ACL_TCAM_LKUP_TYPE_XXX */
    CTC_PORT_DIR_PROP_ACL_TCAM_LKUP_TYPE_1,        /**< [GG.D2.TM.TMM.AT] Acl tcam type. refer CTC_ACL_TCAM_LKUP_TYPE_XXX */
    CTC_PORT_DIR_PROP_ACL_TCAM_LKUP_TYPE_2,        /**< [GG.D2.TM.TMM.AT] Acl tcam type. refer CTC_ACL_TCAM_LKUP_TYPE_XXX */
    CTC_PORT_DIR_PROP_ACL_TCAM_LKUP_TYPE_3,        /**< [GG.D2.TM.TMM.AT] Acl tcam type. refer CTC_ACL_TCAM_LKUP_TYPE_XXX */
    CTC_PORT_DIR_PROP_ACL_USE_MAPPED_VLAN,         /**< [GG.D2.TM.TMM.AT] Acl use mapped vlan*/
    CTC_PORT_DIR_PROP_ACL_PORT_BITMAP_ID,          /**< [GB.GG.D2.TM.TMM.AT] Acl port bitmap id for port bitmap acl */

    CTC_PORT_DIR_PROP_DOT1AE_EN,                   /**< [D2.TM.TMM.AT] Dot1AE enable*/
    CTC_PORT_DIR_PROP_DOT1AE_CHAN_ID,              /**< [D2.TM.TMM.AT] Bind Dot1AE SC ID to port,value = 0 is unbind. For p2mp mode getting binded SC ID, p_value must be an array of uint32, which length is 128 */
    CTC_PORT_DIR_PROP_DOT1AE_STATS,                /**< [TMM.AT] Dot1AE stats computed by port, refer to ctc_dot1ae_an_stats_t*/
    CTC_PORT_DIR_PROP_SD_ACTION,                   /**< [D2.TM.TMM.AT] Port enable Singal Degrade, refer to ctc_port_sd_action_type_t */
	CTC_PORT_DIR_PROP_MAX_FRAME_SIZE,              /**< [TM.TMM.AT] Max frame size */
    CTC_PORT_DIR_PROP_MAC_EN,                      /**< [GG.D2.TM.TMM.AT] Mac enable, only enable/disable mac receive/transmit packets */
    CTC_PORT_DIR_PROP_VLAN_DOMAIN,                 /**< [TM.TMM.AT] Vlan domain of the port */
    CTC_PORT_DIR_PROP_DOT1AE_HASH_TYPE,            /**< [AT] Flow based dot1ae hash type, 0:macsec, 1:ctcsec or cloudsec encrypt after ip header,2:cloudsec encrypt after udp header */
    CTC_PORT_DIR_PROP_PTP_RESIDENCE_TIME_MODE,     /**< [AT] Calculate residence time mode for stacking, 0 means calculate by itsself and 1 means do it together with front or behind stacking nodes*/
    CTC_PORT_DIR_PROP_FLOW_LKUP_BY_OUTER_HEAD,     /**< [AT] If set,indicate tunnel packet will use outer header to do ACL flow lookup */
    CTC_PORT_DIR_PROP_AWARE_TUNNEL_INFO_EN,        /**< [AT] If set, indicate use pkt inner info as lookup key, and outer l4 info can also be used as lookup key */
    CTC_PORT_DIR_PROP_CID,                         /**< [AT] Category Id*/

    MAX_CTC_PORT_DIR_PROP_NUM
};
typedef enum ctc_port_direction_property_e ctc_port_direction_property_t;

/**
  @brief Port mac prefix type
*/
enum ctc_port_mac_prefix_type_e
{
    CTC_PORT_MAC_PREFIX_MAC_NONE    = 0x00,         /**< [GB] None */
    CTC_PORT_MAC_PREFIX_MAC_0       = 0x01,            /**< [GB] Port mac prefix 0 */
    CTC_PORT_MAC_PREFIX_MAC_1       = 0x02,            /**< [GB] Port mac prefix 1 */
    CTC_PORT_MAC_PREFIX_MAC_ALL     = 0x03,           /**< [GB] Port mac prefix 0 and prefix 1 */
    CTC_PORT_MAC_PREFIX_48BIT       = 0x04               /**< [GG.D2.TM.TMM.AT] Port mac 48bit */
};
typedef enum ctc_port_mac_prefix_type_e  ctc_port_mac_prefix_type_t;

/**
  @brief Port mac prefix parameter
*/
struct ctc_port_mac_prefix_s
{
    uint8       prefix_type;                                                       /**< [GB] MAC Prefix bitmap, ctc_port_mac_prefix_type_t*/
    mac_addr_t  port_mac[CTC_PORT_PREFIX_PORT_MAC_NUM];   /**< [GB] Port MAC, high 40 bit. for GB, high 32bit must same, for GG only port_mac array0 is valid */
};
typedef struct ctc_port_mac_prefix_s ctc_port_mac_prefix_t;

/**
  @brief Port mac postfix parameter
*/
struct ctc_port_mac_postfix_s
{
    uint8       prefix_type;                   /**< [GB.GG.D2.TM.TMM.AT] MAC Prefix type, CTC_PORT_MAC_PREFIX_MAC_0: prefix mac0, CTC_PORT_MAC_PREFIX_MAC_1: prefix mac1*/
    uint8       low_8bits_mac;              /**< [GB] Port MAC low 8bit*/
    mac_addr_t  port_mac;                  /**< [GG.D2.TM.TMM.AT] Port MAC 48bit */
};
typedef struct ctc_port_mac_postfix_s ctc_port_mac_postfix_t;

#define CTC_PORT_LINK_STATUS_1G     0x00000001
#define CTC_PORT_LINK_STATUS_XG     0x00000002

/**
  @brief Port link status
*/
struct ctc_port_link_status_s
{
    uint32  status_1g[2];       /**< [GB] Link status of 1G port */
    uint32  status_xg[1];       /**< [GB] Link status of XG port */
    uint32  gport;                  /**< [GB.GG.D2.TM.TMM.TMA.AT] Link change Gport Id */
    uint16  rsv;
};
typedef struct ctc_port_link_status_s ctc_port_link_status_t;

/**
  @brief Phy link status
*/
struct ctc_port_phy_status_s
{
    uint32  gport;                  /**< [D2.TM.TMM.AT] Phy link changed Gport Id */
    uint8   bus;                    /**< [D2.TM.TMM.AT] Bus id>*/
    uint8   phy_addr;               /**< [D2.TM.TMM.AT] Phy address>*/
    uint16   rsv;
};
typedef struct ctc_port_phy_status_s ctc_port_phy_status_t;

/**
  @brief Flow control type
*/
enum ctc_port_fc_type_e
{
    CTC_PORT_FC_TYPE_NORMAL,          /**< [D2.TM.TMM.AT] Normal flow control*/
    CTC_PORT_FC_TYPE_OOB,             /**< [TM.TMM]       Out of band flow control*/
    CTC_PORT_FC_TYPE_OBM,             /**< [D2.TM.TMM.AT] OBM(Oversubscription Buffer Module) flow control*/

    CTC_PORT_FC_TYPE_MAX
};
typedef enum ctc_port_fc_type_e ctc_port_fc_type_t;

/**
  @brief Port fc property parameter
*/
struct ctc_port_fc_prop_s
{
    uint32 gport;                     /**< [GB.GG.D2.TM.TMM.TMA.AT] Global port of flow control */
    uint8  priority_class;            /**< [GG.D2.TM.TMM.AT] Pfc priority class <0-7>, value should be priority/8, priority refer to qos priority, for D2, value should be priority/2 */
    uint8  is_pfc;                    /**< [GB.GG.D2.TM.TMM.AT] If set, Priority based flow control, else port based flow control */
    uint8  is_oobfc;                  /**< [TM.TMM.AT] If set, Indicate out of band flow control */
    uint8  type;                      /**< [D2.TM.TMM.AT] Flow control, refer to ctc_port_fc_type_t */

    uint8  pfc_class;                 /**< [GG.TMM.AT] PFC frame class value <0-7>, for TMM and ARCTIC: only for Rx pause frame  <0-7>*/
    uint8  dir;                       /**< [GB.GG.D2.TM.TMM.TMA.AT] Rx or Tx pause frame */
    uint8  enable;                    /**< [GB.GG.D2.TM.TMM.TMA.AT] Enable/disable flow control */
    uint16 priority_class_bmp;        /**< [TMM.AT] TMM: Bitmap of Pfc priority class <0-7>, only for Rx pause frame, 
                                                         if set, use priority_class_bmp and pfc_class, else use priority_class 
                                                    ARCTIC: Bitmap of Pfc priority class <0-11>*/
};
typedef struct ctc_port_fc_prop_s ctc_port_fc_prop_t;

/**
  @brief Port igs scl hash type
*/
enum ctc_port_igs_scl_hash_type_e
{
    CTC_PORT_IGS_SCL_HASH_TYPE_DISABLE,                 /**< [GB.GG.D2.TM.TMM.TMA.AT] Disable igs scl hash*/

    /*The following Key Type, will correspond to the action of DsUserId or DsSclFlow, through flow_en to decide.*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_2VLAN,           /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port and double vlan id hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_SVLAN,           /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port and svlan id hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_CVLAN,           /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port and cvlan id hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_SVLAN_COS,   /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port, svlan id and cos hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_CVLAN_COS,   /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port, cvlan id and cos hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_MAC_SA,                  /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl macsa hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_MAC_SA,        /**< [GB.GG.D2.TM.TMM.AT] Igs scl port and macsa hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_MAC_DA,                 /**< [GB.GG.D2.TM.TMM.AT] Igs scl macda hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_MAC_DA,        /**< [GB.GG.D2.TM.TMM.AT] Igs scl port and macda hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_IP_SA,                     /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl ipsa hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_IP_DA,                     /**< [TMM.AT] Igs scl ipda hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_IP_SA,            /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl port and ipsa hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_PORT,                      /**< [GB.GG.D2.TM.TMM.AT] Igs scl port hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_NSH,                  /**< [AT] Igs scl nsh hash key */

    /*The following Key Type, will correspond to the action for DsSclFlow*/
    CTC_PORT_IGS_SCL_HASH_TYPE_L2,                          /**< [GB.GG.D2.TM.TMM.AT] Igs scl l2 hash key, include macda, macsa, svlan id/cos/cfi and ether type*/

    /*The following Key Type, will correspond to the action for DsTunnelId*/
    CTC_PORT_IGS_SCL_HASH_TYPE_TUNNEL,                   /**< [GB.GG.D2.TM.TMM.AT] Igs scl for all IPv4/IPv6 manual tunnel which both IPDA IPSA is lookuped, such as IPv4/IPv6 in IPv4/IPv6, GRE with/without GRE type in IPv4/IPv6 tunnel*/
    CTC_PORT_IGS_SCL_HASH_TYPE_TUNNEL_RPF,            /**< [GB.GG.D2.TM.TMM.AT] Igs scl for all IPv4 manual tunnel do outer head RPF check, must used in scl id 1*/
    CTC_PORT_IGS_SCL_HASH_TYPE_IPV4_TUNNEL_AUTO,          /**< [GG.D2.TM.TMM.AT] Igs scl for IPv4/IPv6 in IPv4/IPv6 which only IPDA is lookuped, 6to4, ISATAP tunnel*/
    CTC_PORT_IGS_SCL_HASH_TYPE_NVGRE,                     /**< [GG.D2.TM.TMM.AT] Igs scl for NvGre tunnel*/
    CTC_PORT_IGS_SCL_HASH_TYPE_VXLAN,                     /**< [GG.D2.TM.TMM.AT] Igs scl for VxLan tunnel*/
    CTC_PORT_IGS_SCL_HASH_TYPE_TRILL,                       /**< [GG.D2.TM.TMM.AT] Igs scl for TRILL tunnel or check*/

    CTC_PORT_IGS_SCL_HASH_TYPE_PORT_SVLAN_DSCP,           /**< [TM.TMM.AT] Igs scl port, svlan id and dscp hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_SVLAN,                /**< [D2.TM.TMM.AT] Igs scl use svlan id hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_SVLAN_MAC,            /**< [D2.TM.TMM.AT] Igs scl use svlan id and mac hash type*/
    CTC_PORT_IGS_SCL_HASH_TYPE_UDF,                  /**< [TMM.AT] Igs scl udf hash key, include udf + l2/l3 */
    CTC_PORT_IGS_SCL_HASH_TYPE_MAX
};
typedef enum ctc_port_igs_scl_hash_type_e ctc_port_igs_scl_hash_type_t;

/**
  @brief Port egs scl hash type
*/
enum ctc_port_egs_scl_hash_type_e
{
    CTC_PORT_EGS_SCL_HASH_TYPE_DISABLE,                /**< [GB.GG.D2.TM.TMM.AT] Disable egs scl hash*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_2VLAN,             /**< [GB.GG.D2.TM.TMM.AT] Egs scl port and double vlan id hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_SVLAN,             /**< [GB.GG.D2.TM.TMM.AT] Egs scl port and svlan id hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_CVLAN,             /**< [GB.GG.D2.TM.TMM.AT] Egs scl port and cvlan id hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_SVLAN_COS,         /**< [GB.GG.D2.TM.TMM.AT] Egs scl port, svlan id and cos hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_CVLAN_COS,         /**< [GB.GG.D2.TM.TMM.AT] Egs scl port, cvlan id and cos hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT,                   /**< [GB.GG.D2.TM.TMM.AT] Egs scl port hash type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_XC,                /**< [GB.D2.TM.TMM.AT] Egs scl port cross connect type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_PORT_VLAN_XC,           /**< [GG.D2.TM.TMM.AT] Egs scl port vlan cross type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_MD_ISOLATION_GRP,       /**< [TMM.AT] Egs scl medatadata and isolation group type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_FID_LDP_GRP,            /**< [TMM.AT] Egs scl fid and logic port group type*/
    CTC_PORT_EGS_SCL_HASH_TYPE_LP_XC,                  /**< [TMM.AT] Egs scl logic sourc port and logic dest port*/
    CTC_PORT_EGS_SCL_HASH_TYPE_LP_GRP,                 /**< [TMM.AT] Egs scl cid and logic port group*/
    CTC_PORT_EGS_SCL_HASH_TYPE_NSH,                    /**< [AT] Only for NSH edit, can not be used for hash key config */
    CTC_PORT_EGS_SCL_HASH_TYPE_MAX
};
typedef enum ctc_port_egs_scl_hash_type_e ctc_port_egs_scl_hash_type_t;

/**
  @brief Port igs scl tcam type
*/
enum ctc_port_igs_scl_tcam_type_e
{
    CTC_PORT_IGS_SCL_TCAM_TYPE_DISABLE,                     /**< [GB.GG.D2.TM.TMM.TMA.AT] Disable igs scl tcam*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_MAC,                         /**< [GB.GG.D2.TM.TMM.TMA.AT] Igs scl mac tcam type*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_IP,                          /**< [GB.GG.D2.TM.TMM.AT] (GG)auto adujst for ipv6. for other l3-type packet, including l3,mac info*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_IP_SINGLE,                   /**< [GG.D2.TM.TMM.AT] (GG)auto adujst for ipv6. for other l3-type packet, only including l3 info*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_VLAN,                        /**< [GB.GG] Igs scl tcam type*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_TUNNEL,                      /**< [GB] For all IPv4 auto tunnel which IPSA do not care, such as ISATAP/6TO4 and anyInIPv6 tunnel*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_TUNNEL_RPF,                  /**< [GB] For all IPv4 auto tunnel and anyInIPv6 tunnel do outer head RPF check, must used in scl id 1*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_RESOLVE_CONFLICT,            /**< [D2.TM.TMM.AT] Resolve scl hash confilct*/
    CTC_PORT_IGS_SCL_TCAM_TYPE_UDF,                         /**< [TM.TMM.AT] Scl udf tcam type */
    CTC_PORT_IGS_SCL_TCAM_TYPE_UDF_EXT,                     /**< [TM.TMM.AT] Scl udf extern tcam type */
    CTC_PORT_IGS_SCL_TCAM_TYPE_UDF_QUAD,                    /**< [TMM.AT] Scl udf quad tcam type */
    CTC_PORT_IGS_SCL_TCAM_TYPE_MAX
};
typedef enum ctc_port_igs_scl_tcam_type_e ctc_port_igs_scl_tcam_type_t;

/**
  @brief Port igs scl action type
*/
enum ctc_port_scl_action_type_e
{
    CTC_PORT_SCL_ACTION_TYPE_SCL,                  /**< [GG.D2] Scl action type scl*/
    CTC_PORT_SCL_ACTION_TYPE_FLOW,                 /**< [GG.D2] Scl action type flow*/
    CTC_PORT_SCL_ACTION_TYPE_TUNNEL,               /**< [GG.D2] Scl action type tunnel*/
    CTC_PORT_SCL_ACTION_TYPE_MAX
};
typedef enum ctc_port_scl_action_type_e ctc_port_scl_action_type_t;

/**
  @brief Port scl property parameter
*/
struct ctc_port_scl_property_s
{
    uint8 scl_id;                           /**< [GB.GG.D2.TM.TMM.TMA.AT] There are 2 scl lookup<0-1>, and each has its own feature*/
    uint8 direction;                       /**< [GB.GG.D2.TM.TMM.TMA.AT] Direction, CTC_INGRESS or CTC_EGRESS*/

/* property */
    uint8 hash_type;                    /**< [GB.GG.D2.TM.TMM.TMA.AT] Hash type. refer ctc_port_igs_scl_hash_type_t or ctc_port_egs_scl_hash_type_t*/
    uint8 action_type;                  /**< [GG.D2.TM.TMM.AT] Action type. apply on both scl0 and scl1. refer ctc_port_scl_action_type_t*/
    uint8 tcam_type;                    /**< [GB.GG.D2.TM.TMM.TMA.AT] Ingress only. refer ctc_port_igs_scl_tcam_type_t*/
    uint8 class_id_en;                  /**< [GB.GG.D2.TM.TMM.AT] Use class id to lookup scl*/
    uint16 class_id;                    /**< [GB.GG.D2.TM.TMM.AT] Class id. If enable ip source guard,it must be CTC_PORT_CLASS_ID_RSV_IP_SRC_GUARD;
                                                        If enable ip VLAN Class,it must be CTC_PORT_CLASS_ID_RSV_VLAN_CLASS;
                                                        AT, if pon module init, represent logicport mask value*/
    uint8 use_logic_port_en;        /**< [GB.GG.D2.TM.TMM.AT] SCL lookup port use logic port*/
    uint8 hash_vlan_range_dis;       /**< [TM.TMM.TMA.AT] Disable hash vlan range */
    uint8 tcam_vlan_range_dis;       /**< [TM.TMM.AT] Disable tcam vlan range */
    uint8 hash_mcast_dis;            /**< [TM.TMM.AT] When packet is mcast, disable hash lookup */
    uint8 hash_field_sel_id_valid;      /**< [TMM.AT] Hash field select id valid */
    uint8 hash_field_sel_id;            /**< [TMM.AT] Hash field select id */
    uint16 default_merge_bmp;           /**< [TMM.AT] SCL default action merge info the same action*/
    uint8 flex_key_en;                  /**< [AT] Enable SCL flex key lookup */
};
typedef struct ctc_port_scl_property_s ctc_port_scl_property_t;

/**
 @brief port bpe  extend type
*/
enum ctc_port_bpe_extend_type_e
{
    CTC_PORT_BPE_EXTEND_TYPE_NONE,     /**< [D2.TM.TMM.AT] Normal port */
    CTC_PORT_BPE_8021BR_PE_EXTEND,     /**< [D2.TM.TMM.AT] Extend port of PE */
    CTC_PORT_BPE_8021BR_PE_CASCADE,    /**< [D2.TM.TMM.AT] Cascade port of PE */
    CTC_PORT_BPE_8021BR_PE_UPSTREAM,   /**< [D2.TM.TMM.AT] Upstream port of PE */
    CTC_PORT_BPE_EXTEND_TYPE_MAX
};
typedef enum ctc_port_bpe_extend_type_e  ctc_port_bpe_extend_type_t;

/**
  @brief Port bpe property parameter
*/
struct ctc_port_bpe_property_s
{
    uint8  extend_type;             /**< [D2.TM.TMM.AT] Bpe port extend type */
    uint16  name_space;              /**< [D2.TM.TMM.AT] Bpe 8021br namespace */
	uint16 ecid;                    /**< [D2.TM.TMM.AT] Bpe extend ecid */
};
typedef struct ctc_port_bpe_property_s ctc_port_bpe_property_t;


/**
 @brief Port global config parameter
*/
struct ctc_port_global_cfg_s
{
    uint8 default_logic_port_en;    /**< [GB.GG.D2.TM.TMM.AT] If set, port will enable default logic port for all local phy port and linkagg group(default: 0)*/
    uint8 isolation_group_mode;  /**< [D2.TM] Ctc_isolation_group_mode_t(default: 0)*/
    uint8 use_isolation_id;           /**< [D2.TM.TMM.AT] Choice port isolation basing port or group(default: 0)*/
};
typedef struct ctc_port_global_cfg_s ctc_port_global_cfg_t;

/**
 @brief  Define the mode of isolation group
*/
enum ctc_isolation_group_mode_e
{
    CTC_ISOLATION_GROUP_MODE_64 = 0,     /**< [D2.TM] Isolation group num is 64, Max Member is 64*/
    CTC_ISOLATION_GROUP_MODE_32,         /**< [D2.TM] Isolation group num is 32, Max Member is 128*/
    CTC_ISOLATION_GROUP_MODE_16,        /**< [D2.TM] Isolation group num is 16, Max Member is 256*/
    CTC_ISOLATION_GROUP_MODE_MAX
};
typedef enum ctc_isolation_group_mode_e  ctc_isolation_group_mode_t;

/**
 @brief Port with serdes info
*/
struct ctc_port_serdes_info_s
{
   uint16 serdes_id;                     /**<[GB.GG.D2.TM.TMM.TMA.AT] Serdes ID, if the port have multi-serdes,indicate it's serdes-id base */
   uint16 overclocking_speed;           /**< [GB.GG.D2.TM.TMM.AT] Overclocking speed value */
   uint8 serdes_num;                    /**<[GB.GG.D2.TM.TMM.AT] Serdes num */
   uint8 serdes_mode;                   /**< [GB.GG.D2.TM.TMM.TMA.AT] Serdes mode, refer to ctc_chip_serdes_mode_t */
   uint8 ready;                         /**<[TMM] serdes ready status*/
   uint8 signal_detect;                 /**<[TMM] signal detect status*/
   uint32 gport;                        /**< [GB.GG.D2.TM.TMM.TMA.AT] Gport */
   uint16 serdes_id_array[CTC_PORT_SERDES_MAX_NUM];  /**<[GB.GG.D2.TM.TMM.AT] Per port all serdes id, refer to serdes_num */
};
typedef struct ctc_port_serdes_info_s ctc_port_serdes_info_t;


/**
  @brief Port pause port ability flags
*/
#define CTC_PORT_PAUSE_ABILITY_TX_EN (1 << 0 )     /**< [TM] Pause ability tx enable */
#define CTC_PORT_PAUSE_ABILITY_RX_EN (1 << 1 )     /**< [TM] Pause ability rx enable */

/**
 @brief Port capability type
*/
enum ctc_port_capability_type_e
{
    CTC_PORT_CAP_TYPE_SERDES_INFO = 0,      /**< [GB.GG.D2.TM.TMM.AT] Get serdes info, refer to ctc_port_serdes_info_t */
    CTC_PORT_CAP_TYPE_MAC_ID,               /**< [GB.GG.D2.TM.TMM.AT] Get mac id */
    CTC_PORT_CAP_TYPE_SPEED_MODE,           /**< [D2.TM.TMM.AT] Get speed mode bitmap, refer to ctc_port_speed_t */
    CTC_PORT_CAP_TYPE_IF_TYPE,              /**< [D2.TM.TMM.AT] Get interface type bitmap, refer to ctc_port_if_type_t */
    CTC_PORT_CAP_TYPE_FEC_TYPE,             /**< [D2.TM.TMM.AT] Get FEC type bitmap, refer to ctc_port_fec_type_t */
    CTC_PORT_CAP_TYPE_CL73_ABILITY,         /**< [D2.TM.TMM.AT] Set/get CL73 ability, refer to ctc_port_cl73_ability_t */
    CTC_PORT_CAP_TYPE_CL73_REMOTE_ABILITY,  /**< [D2.TM.TMM.AT] Get CL73 remote ability, refer to ctc_port_cl73_ability_t */
    CTC_PORT_CAP_TYPE_LOCAL_PAUSE_ABILITY,  /**< [TM.TMM.AT] Set/get local pause ability, refer to port pause ability */
    CTC_PORT_CAP_TYPE_REMOTE_PAUSE_ABILITY, /**< [TM.TMM.AT] Get remote pause ability, refer to port pauseability */
    CTC_PORT_CAP_MAX_TYPE
};
typedef enum ctc_port_capability_type_e ctc_port_capability_type_t;
/**@} end of @defgroup port  */

/**
 @brief Port interface type
*/
enum ctc_port_if_type_e
{
    CTC_PORT_IF_NONE = 0,      /**< [D2.TM.TMM.TMA.AT] Invalid interface type */
    CTC_PORT_IF_SGMII,         /**< [D2.TM.TMM.TMA.AT] SGMII type */
    CTC_PORT_IF_2500X,         /**< [D2.TM.TMM.AT] 2500X type */
    CTC_PORT_IF_QSGMII,        /**< [D2.TM.TMM.TMA.AT] QSGMII type */
    CTC_PORT_IF_USXGMII_S,     /**< [D2.TM.TMM.AT] USXGMII Single type */
    CTC_PORT_IF_USXGMII_M2G5,  /**< [D2.TM.TMM.AT] USXGMII Multi 2.5G type */
    CTC_PORT_IF_USXGMII_M5G,   /**< [D2.TM.TMM.AT] USXGMII Multi 5G type */
    CTC_PORT_IF_XAUI,          /**< [D2.TM.TMM.AT] XAUI type */
    CTC_PORT_IF_DXAUI,         /**< [D2.TM.TMM.AT] DXAUI type */
    CTC_PORT_IF_XFI,           /**< [D2.TM.TMM.AT] XFI type */
    CTC_PORT_IF_KR,            /**< [D2.TM.TMM.AT] KR type, 1 lane per port */
    CTC_PORT_IF_CR,            /**< [D2.TM.TMM.AT] CR type, 1 lane per port */
    CTC_PORT_IF_KR2,           /**< [D2.TM.TMM.AT] KR2 type, 2 lanes per port */
    CTC_PORT_IF_CR2,           /**< [D2.TM.TMM.AT] CR2 type, 2 lanes per port */
    CTC_PORT_IF_KR4,           /**< [D2.TM.TMM.AT] KR4 type, 4 lanes per port */
    CTC_PORT_IF_CR4,           /**< [D2.TM.TMM.AT] CR4 type, 4 lanes per port */
    CTC_PORT_IF_FX,            /**< [TM.TMM.TMA.AT] 100BaseFX */
    CTC_PORT_IF_KR8,           /**< [TMM.AT] KR8 type, 8 lanes per port */
    CTC_PORT_IF_CR8,           /**< [TMM.AT] CR8 type, 8 lanes per port */

    CTC_PORT_IF_FLEXE,         /**< [TMM] For FlexE client */
    CTC_PORT_IF_PHY,           /**< [TMA] Internal phy */

    CTC_PORT_IF_MAX_TYPE
};
typedef enum ctc_port_if_type_e ctc_port_if_type_t;

/**
 @brief Port interface mode
*/
struct ctc_port_if_mode_s
{
    ctc_port_speed_t     speed;        /**< [D2.TM.TMM.TMA.AT] Port speed*/
    ctc_port_if_type_t   interface_type;      /**< [D2.TM.TMM.TMA.AT] Port interface type*/
};
typedef struct ctc_port_if_mode_s ctc_port_if_mode_t;


/**
  @brief Port mux type
*/
enum ctc_port_mux_type_e
{
    CTC_PORT_MUX_TYPE_NONE                    = 0x00,            /**< [GG] Without outer stacking header encap */
    CTC_PORT_MUX_TYPE_CLOUD_L2_HDR            = 0x01,            /**< [GG] With L2 cloud stacking header format encap */
    CTC_PORT_MUX_TYPE_MAX
};
typedef enum ctc_port_mux_type_e  ctc_port_mux_type_t;

struct ctc_logic_port_scl_property_s
{
    uint8 scl_id;                           /**< [TMM.AT] There are 2 scl lookup<0-1>, and each has its own feature*/

    /* property */
    uint8 hash_type;                        /**< [TMM.AT] Hash type. refer ctc_port_igs_scl_hash_type_t or ctc_port_egs_scl_hash_type_t*/
    uint8 flex_key_en;                      /**< [AT] Enable SCL flex key lookup */
};
typedef struct ctc_logic_port_scl_property_s ctc_logic_port_scl_property_t;

/*
  @brief logic Port property flags
*/
enum ctc_logic_port_property_e
{
    CTC_LOGIC_PORT_PROP_GRP_ID,                     /**< [TMM.AT] Logic port group id */
    CTC_LOGIC_PORT_PROP_SCL_EN,                     /**< [TMM.AT] Enable scl hash type, refer to ctc_logic_port_scl_property_t */
    CTC_LOGIC_PORT_PROP_ISOLATION_ID,               /**< [TMM.AT] Isolation id */
    CTC_LOGIC_PORT_PROP_ESID,                       /**< [AT] Evpn EsId*/
    CTC_LOGIC_PORT_PROP_ACL_LKUP_BY_OUTER_HEAD,     /**< [AT] ACL flow lookup 0: flow, 1: use inner header, 2: use outer header */
    CTC_LOGIC_PORT_PROP_ACL_AWARE_TUNNEL_INFO_EN,   /**< [AT] Outer l4 info can also be used as lookup key 0: flow, 1: disable, 2: enable*/
    CTC_LOGIC_PORT_PROP_IPFIX_LKUP_BY_OUTER_HEAD,   /**< [AT] IPFIX flow lookup 0: flow, 1: use inner header, 2: use outer header  */

    CTC_LOGIC_PORT_PROP_MAX_NUM,
};
typedef enum ctc_logic_port_property_e  ctc_logic_port_property_t;

#ifdef __cplusplus
}
#endif

#endif

